ADMV4530 datasheet(10/64 Pages) AD

Part #	ADMV4530

Description	Dual-Mode, Ka Band Upconverter with Integrated Fractional-N PLL and VCO

PDF	64 Pages

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Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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10 / 64 page

Data Sheet

ADMV4530

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. C | 10 of 64

Table 7. Pin Function Descriptions (Continued)

Pin No.

Mnemonic

Description

VCC_LDO

Supply Voltage for the Internal LDO Regulator, 3.3 V. Place a 1 µF decoupling capacitor close to this pin.

VCC_CP

Supply Voltage for the Charge Pump, 3.3 V. Place a 1 µF decoupling capacitor close to this pin.

RST

Reset. 3.3 V logic. Active low.

REF_IN

PLL Reference Input. Apply an external reference signal to this pin with a 0.01 µF, dc blocking capacitor. Refer to

Figure 90 for the external reference input configuration.

VCC_1P8V

Supply Voltage for the SPI Block, 1.8 V. Place a 1 µF decoupling capacitor close to this pin. The voltage on

VCC_1P8V must be applied at the same time or after all other supply pin voltages have been applied.

37, 39

GND

Ground. Connect these pins to RF and dc ground.

RFOUT

RF Output. This pin has a 50 Ω output impedance.

EPAD

Exposed Pad. Connect the exposed pad to RF and dc ground.

ADMV4530 Datasheet(PDF) 10 Page - Analog Devices