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AT80SND1C-ROTIL Datasheet(PDF) 105 Page - ATMEL Corporation

Part # AT80SND1C-ROTIL
Description  Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
PDF  210 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT80SND1C-ROTIL Datasheet(HTML) 105 Page - ATMEL Corporation

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105
AT8xC51SND1C
4109E–8051–06/03
Table 97. UEPRST Register
UEPRST (S:D5h) – USB Endpoint FIFO Reset Register
Reset Value = 0000 0000b
Table 98. UEPINT Register
UEPINT (S:F8h Read-only) – USB Endpoint Interrupt Register
Reset Value = 0000 0000b
7654
3210
-----
EP2RST
EP1RST
EP0RST
Bit
Number
Bit
Mnemonic
Description
7 - 3
-
Reserved
The value read from these bits is always 0. Do not set these bits.
2EP2RST
Endpoint 2 FIFO Reset
Set and clear to reset the endpoint 2 FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
1EP1RST
Endpoint 1 FIFO Reset
Set and clear to reset the endpoint 1 FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
0EP0RST
Endpoint 0 FIFO Reset
Set and clear to reset the endpoint 0 FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
7654
3210
-----
EP2INT
EP1INT
EP0INT
Bit
Number
Bit
Mnemonic
Description
7 - 3
-
Reserved
The value read from these bits is always 0. Do not set these bits.
2EP2INT
Endpoint 2 Interrupt Flag
Set by hardware when an interrupt is triggered in UEPSTAX and the endpoint 2
interrupt is enabled in UEPIEN.
Must be cleared by software.
1EP1INT
Endpoint 1 Interrupt Flag
Set by hardware when an interrupt is triggered in UEPSTAX and the endpoint 1
interrupt is enabled in UEPIEN.
Must be cleared by software.
0EP0INT
Endpoint 0 Interrupt Flag
Set by hardware when an interrupt is triggered in UEPSTAX and the endpoint 0
interrupt is enabled in UEPIEN.
Must be cleared by software.



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