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AT80SND1C-ROTIL Datasheet(PDF) 113 Page - ATMEL Corporation |
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AT80SND1C-ROTIL Datasheet(HTML) 113 Page - ATMEL Corporation |
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113 / 210 page  113 AT8xC51SND1C 4109E–8051–06/03 Table 108. R3 Response Format (OCR Register) Table 109. R4 Response Format (Fast I/O) Table 110. R5 Response Format Data Packet Format There are 2 types of data packets: stream and block. As shown in Figure 77, stream data packets have an indeterminate length while block packets have a fixed length depending on the block length. Each data packet is preceded by a Start bit: a low level on MCMD line and succeeded by an End bit: a high level on MCMD line. Due to the fact that there is no predefined end in stream packets, CRC protection is not included in this case. The CRC protection algorithm for block data is a 16-bit CCITT polynomial. Figure 77. Data Token Format Clock Control The MMC bus clock signal can be used by the host to turn the cards into energy saving mode or to control the data flow (to avoid under-run or over-run conditions) on the bus. The host is allowed to lower the clock frequency or shut it down. There are a few restrictions the host must follow: • The bus frequency can be changed at any time (under the restrictions of maximum data transfer frequency, defined by the cards, and the identification frequency defined by the specification document). • It is an obvious requirement that the clock must be running for the card to output data or response tokens. After the last MultiMedia Card bus transaction, the host is Bit Position 47 46 [45:40] [39:8] [7:1] 0 Width (bits) 1 1 6327 1 Value ‘0’‘0’‘111111’ - ‘1111111’‘1’ Description Start bit Transmission bit Reserved OCR register Reserved End bit Bit Position 47 46 [45:40] [39:8] [7:1] 0 Width (bits) 11 6 32 7 1 Value ‘0’‘0’‘100111’ -- ‘1’ Description Start bit Transmission bit Command Index Argument CRC7 End bit Bit Position 47 46 [45:40] [39:8] [7:1] 0 Width (bits) 1 1 6327 1 Value ‘0’‘0’‘101000’ -- ‘1’ Description Start bit Transmission bit Command Index Argument CRC7 End bit 0 Content 1 Sequential Data CRC Block Data 0 Content 1 Block Length |
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