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MPC8272EC Datasheet(PDF) 42 Page - Freescale Semiconductor, Inc |
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MPC8272EC Datasheet(HTML) 42 Page - Freescale Semiconductor, Inc |
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42 / 60 page ![]() MPC8272 PowerQUICC II™ Family Hardware Specifications, Rev. 2 42 Freescale Semiconductor Clock Configuration Modes 1110_000 25.0 50.0 5 125.0 250.0 2.5 156.3 312.5 2 62.5 125.0 1110_001 25.0 50.0 5 125.0 250.0 3 187.5 375.0 2 62.5 125.0 1110_010 28.6 50.0 5 142.9 250.0 3.5 250.0 437.5 2 71.4 125.0 1110_011 25.0 50.0 5 125.0 250.0 4 250.0 500.0 2 62.5 125.0 1110_100 25.0 50.0 5 125.0 250.0 4 166.7 333.3 3 41.7 83.3 1110_101 25.0 50.0 5 125.0 250.0 4.5 187.5 375.0 3 41.7 83.3 1110_110 25.0 50.0 5 125.0 250.0 5 208.3 416.7 3 41.7 83.3 1110_111 25.0 50.0 5 125.0 250.0 5.5 229.2 458.3 3 41.7 83.3 1100_000 Reserved 1100_001 Reserved 1100_010 Reserved 1 The “low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a table entry guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose of illustration only. Users must select a mode and input bus frequency so that the resulting configuration does not exceed the frequency rating of the user’s device. The minimum CPU frequency is 150 MHz for commercial temperature devices and 175 MHz for extended temperature devices. The minimum CPM frequency is 120 MHz. 2 PCI_MODCK determines the PCI clock frequency range. Refer to Table 18 for higher range configurations. 3 MODCK_H = hard reset configuration word [28–31] (refer to Section 5.4 in the MPC8260 User’s Manual). MODCK[1-3] = three hardware configuration pins. 4 CPM multiplication factor = CPM clock/bus clock 5 CPU multiplication factor = Core PLL multiplication factor Table 19. Clock Configurations for PCI Agent Mode (PCI_MODCK=1) 1, 2 (continued) Mode 3 PCI Clock (MHz) CPM Multiplication Factor 4 CPM Clock (MHz) CPU Multiplication Factor 5 CPU Clock (MHz) Bus Division Factor Bus Clock (MHz) MODCK_H- MODCK[1-3] Low High Low High Low High Low High |
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