MPC8610EC datasheet(66/96 Pages) FREESCALE

66 / 96 page

MPC8610 Integrated Host Processor Hardware Specifications, Rev. 0

Electrical Characteristics

Freescale Semiconductor

Figure 41. Minimum Transmitter Timing and Voltage Output Compliance Specifications

2.18.4.3

Differential Receiver (RX) Input Specifications

Table 50 defines the specifications for the differential input at all receivers (RXs). The parameters are specified at the

component pins.

Table 50. Differential Receiver (RX) Input Specifications

Symbol

Parameter

Min

Nom

Max

Units

Comments

Unit interval

399.88

400

400.12

Each UI is 400 ps ± 300 ppm. UI does not account for

Spread Spectrum Clock dictated variations.

See Note 1.

VRX-DIFFp-p

Differential

peak-to-peak

output voltage

0.175

1.200

VRX-DIFFp-p = 2*|VRX-D+ – VRX-D–|

See Note 2

TRX-EYE

Minimum

receiver eye

width

0.4

The maximum interconnect media and transmitter

jitter that can be tolerated by the receiver can be

derived as TRX-MAX-JITTER = 1 – TRX-EYE= 0.6 UI.

See Notes 2 and 3

TRX-EYE-MEDIAN-to-MAX

-JITTER

Maximum time

between the jitter

median and

maximum

deviation from

the median.

0.3

Jitter is defined as the measurement variation of the

crossing points (VRX-DIFFp-p = 0 V) in relation to a

recovered TX UI. A recovered TX UI is calculated over

3500 consecutive unit intervals of sample data. Jitter

is measured using all edges of the 250 consecutive UI

in the center of the 3500 UI used for calculating the TX

UI. See Notes 2, 3, and 7

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