PCF8576C datasheet(35/56 Pages) NXP

35 / 56 page

PCF8576C_9

Product data sheet

Rev. 09 — 9 July 2009

35 of 56

NXP Semiconductors

PCF8576C

Universal LCD driver for low multiplex rates

13. Application information

13.1 Cascaded operation

In large display conﬁgurations, up to 16 PCF8576Cs can be recognized on the same

I2C-bus by using the 3-bit hardware subaddress (A0, A1 and A2) and the programmable

I2C-bus slave address (SA0).

Cascaded PCF8576Cs are synchronized. They can share the backplane signals from one

of the devices in the cascade. Such an arrangement is cost-effective in large LCD

applications since the backplane outputs of only one device need to be through-plated to

the backplane electrodes of the display. The other PCF8576Cs of the cascade contribute

additional segment outputs but their backplane outputs are left open-circuit (see

Figure 29).

The PCF8576C can also be cascaded with the PCF8566. The connections are identical to

the PCF8576C cascade.

Table 21.

Addressing cascaded PCF8576C

Cluster

Bit SA0

Pin A2

Pin A1

Pin A0

Device

100000

0011

0102

0113

1004

1015

1106

1117

210008

0019

01010

01111

10012

10113

11014

11115

PCF8576C Datasheet(PDF) 35 Page - NXP Semiconductors

PCF8576C Datasheet(HTML) 35 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

Datasheet Download

Link URL