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PCF8576CU/2 Datasheet(PDF) 30 Page - NXP Semiconductors |
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PCF8576CU/2 Datasheet(HTML) 30 Page - NXP Semiconductors |
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30 / 56 page ![]() PCF8576C_9 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 09 — 9 July 2009 30 of 56 NXP Semiconductors PCF8576C Universal LCD driver for low multiplex rates 11. Static characteristics [1] VLCD ≤ VDD − 3 V for 1⁄3 bias. [2] LCD outputs are open-circuit; inputs at VSS or VDD; external clock with 50 % duty factor; I2C-bus inactive. [3] Resets all logic when VDD < VPOR. [4] Periodically sampled, not 100 % tested. [5] Outputs measured one at a time. Table 19. Static characteristics VDD = 2.0 V to 6.0 V; VSS = 0 V; VLCD = VDD − 6.0 V; Tamb = −40 °C to +85 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Supplies VDD supply voltage 2.0 - 6.0 V VLCD LCD supply voltage [1] VDD − 6.0 - VDD − 2.0 V IDD supply current: fclk = 200 kHz [2] - - 120 µA IDD(lp) low-power mode supply current VDD = 3.5 V; VLCD =0V; fclk = 35 kHz; A0, A1 and A2 connected to VSS -- 60 µA Logic VIL LOW-level input voltage on pins CLK, SYNC, OSC, A0 to A2 and SA0 VSS - 0.3VDD V VIH HIGH-level input voltage on pins CLK, SYNC, OSC, A0 to A2 and SA0 0.7VDD -VDD V VOL LOW-level output voltage IOL = 0 mA - - 0.05 V VOH HIGH-level output voltage IOH = 0 mA VDD − 0.05 - - V IOL LOW-level output current VOL = 1.0 V; VDD = 5.0 V; on pins CLK and SYNC 1- - mA IL leakage current VI =VDD or VSS; on pins CLK, SCL, SDA, A0 to A2 and SA0 −1- +1 µA IL(OSC) leakage current on pin OSC VI =VDD −1- +1 µA Ipd pull-down current VI = 1.0 V; VDD = 5.0 V; on pins A0 to A2 and OSC 15 50 150 µA RSYNC_N SYNC resistance 20 50 150 k Ω VPOR power-on reset voltage [3] - 1.0 1.6 V CI input capacitance [4] -- 7 pF I2C-bus; pins SDA and SCL VIL LOW-level input voltage VSS - 0.3VDD V VIH HIGH-level input voltage 0.7VDD - 6.0 V IOH(CLK) HIGH-level output current on pin CLK VOH = 4.0 V; VDD = 5.0 V −1- - mA IOL(SDA) LOW-level output current on pin SDA VOL = 0.4 V; VDD = 5.0 V 3 - - mA LCD outputs VBP voltage on pin BP Cbpl = 35 nF; on pins BP0 to BP3 −20 - +20 mV VS voltage on pin S Csgm = 5 nF; on pins S0 to S39 −20 - +20 mV RBP resistance on pin BP VLCD =VDD − 5 V; on pins BP0 to BP3 [5] -- 5 k Ω RS resistance on pin S VLCD =VDD − 5 V; on pins S0 to S39 [5] - - 7.5 k Ω |
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