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STM32F101X4 Datasheet(PDF) 58 Page - STMicroelectronics |
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STM32F101X4 Datasheet(HTML) 58 Page - STMicroelectronics |
58 / 73 page Electrical characteristics STM32F101x4, STM32F101x6 58/74 Doc ID 15058 Rev 3 Figure 24. SPI timing diagram - slave mode and CPHA = 0 Figure 25. SPI timing diagram - slave mode and CPHA = 1(1) 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. ai14134c CPHA= 0 MOSI INPUT MISO OUT P UT CPHA= 0 MS B O UT MSB IN BI T6 OUT LSB IN LSB OUT CPOL=0 CPOL=1 BI T1 IN NSS input tSU(NSS) tc(SCK) th(NSS) ta(SO) tw(SCKH) tw(SCKL) tv(SO) th(SO) tr(SCK) tf(SCK) tdis(SO) tsu(SI) th(SI) ai14135 CPHA=1 MOSI INPUT MISO OUT P UT CPHA=1 MS B O UT MSB IN BI T6 OUT LSB IN LSB OUT CPOL=0 CPOL=1 BI T1 IN tSU(NSS) tc(SCK) th(NSS) ta(SO) tw(SCKH) tw(SCKL) tv(SO) th(SO) tr(SCK) tf(SCK) tdis(SO) tsu(SI) th(SI) NSS input |
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