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STM32F101X4 Datasheet(PDF) 72 Page - STMicroelectronics

Part # STM32F101X4
Description  Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F101X4 Datasheet(HTML) 72 Page - STMicroelectronics

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Revision history
STM32F101x4, STM32F101x6
72/74
Doc ID 15058 Rev 3
8
Revision history
Table 51.
Document revision history
Date
Revision
Changes
23-Sep-2008
1
Initial release.
07-Apr-2009
2
I/O information clarified on page 1. Figure 6: Memory map modified.
In Table 4: Low-density STM32F101xx pin definitions: PB4, PB13, PB14,
PB15, PB3/TRACESWO moved from Default column to Remap column.
VREF- is not available in the offered packages: Figure 1: STM32F101xx
low-density access line block diagram, Figure 9: Power supply scheme
and Figure 29: Power supply and reference decoupling updated,
Figure 30: Power supply and reference decoupling (VREF+ not connected
to VDDA) removed.
Note modified in Table 12: Maximum current consumption in Run mode,
code with data processing running from Flash and Table 14: Maximum
current consumption in Sleep mode, code running from Flash or RAM.
Figure 14, Figure 15 and Figure 16 show typical curves.
ACCHSI max values modified in Table 23: HSI oscillator characteristics.
Small text changes.
24-Sep-2009
3
Note 5 updated and Note 4 added in Table 4: Low-density STM32F101xx
pin definitions.
VRERINT and TCoeff added to Table 11: Embedded internal reference
voltage. Typical IDD_VBATvalue added in Table 15: Typical and maximum
current consumptions in Stop and Standby modes. Figure 13: Typical
current consumption on VBAT with RTC on versus temperature at
different VBAT values added.
fHSE_ext min modified in Table 19: High-speed external user clock
characteristics.
CL1 and CL2 replaced by C in Table 21: HSE 4-16 MHz oscillator
characteristics and Table 22: LSE oscillator characteristics (fLSE =
32.768 kHz), notes modified and moved below the tables.
Note 1 modified below Figure 19: Typical application with an 8 MHz
crystal.
Table 23: HSI oscillator characteristics modified. Conditions removed
from Table 25: Low-power mode wakeup timings.
Figure 22: Recommended NRST pin protection modified.
IEC 1000 standard updated to IEC 61000 and SAE J1752/3 updated to
IEC 61967-2 in Section 5.3.10: EMC characteristics on page 48.
Jitter added to Table 26: PLL characteristics.
CADC and RAIN parameters modified in Table 41: ADC characteristics.
RAIN max values modified in Table 42: RAIN max for fADC = 14 MHz.
Small text changes.


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