STM32F101X4 datasheet(49/73 Pages) STMICROELECTRONICS

Part #	STM32F101X4

Description	Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces

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STM32F101x4, STM32F101x6

Electrical characteristics

Doc ID 15058 Rev 3

49/74

Electromagnetic Interference (EMI)

The electromagnetic field emitted by the device is monitored while a simple application is

executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with

IEC61967-2 standard which specifies the test board and the pin loading.

5.3.11

Absolute maximum ratings (electrical sensitivity)

Based on three different tests (ESD, LU) using specific measurement methods, the device is

stressed in order to determine its performance in terms of electrical sensitivity.

Electrostatic discharge (ESD)

Electrostatic discharges (a positive then a negative pulse separated by 1 second) are

applied to the pins of each sample according to each pin combination. The sample size

depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test

conforms to the JESD22-A114/C101 standard.

Static latch-up

Two complementary static tests are required on six parts to assess the latch-up

performance:

●

A supply overvoltage is applied to each power supply pin

●

A current injection is applied to each input, output and configurable I/O pin

These tests are compliant with EIA/JESD 78 IC latch-up standard.

Table 30.

EMI characteristics

Symbol Parameter

Conditions

Monitored

frequency band

Max vs. [fHSE/fHCLK]

Unit

8/36 MHz

SEMI

Peak level

VDD 3.3 V, TA 25 °C,

LQFP100 package

compliant with

IEC 61967-2

0.1 MHz to 30 MHz

7

dBµV

30 MHz to 130 MHz

8

130 MHz to 1GHz

13

SAE EMI Level

3.5

-

Table 31.

ESD absolute maximum ratings

Symbol

Ratings

Conditions

Class

Maximum

value(1)

1.

Based on characterization results, not tested in production.

Unit

VESD(HBM)

Electrostatic discharge

voltage (human body model)

TA +25 °C

conforming to JESD22-A114

2

2000

V

VESD(CDM)

Electrostatic discharge

voltage (charge device model)

TA +25 °C

conforming to JESD22-C101

II

500

Table 32.

Electrical sensitivities

Symbol

Parameter

Conditions

Class

LU

Static latch-up class

TA +85 °C conforming to JESD78A

II level A

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STM32F101X4 Datasheet(PDF) 49 Page - STMicroelectronics

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