LTC4100

5

4100fb

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Logic Levels

SCL/SDA Input Low Voltage

●

0.8

V

SCL/SDA Input High Voltage

●

2.1

V

SDA Output Low Voltage

●

0.4

V

SCL/SDA Input Current

–1

1

μA

SCL/SDA Input Current

–1

1

μA

SMBALERT Output Low Voltage

●

0.4

V

SMBALERT Output Pull-Up Current

–17.5

–10

–3.5

μA

SDA/SCL/SMBALERT Power Down Leakage

●

–2

2

μA

CHGEN Output Low Voltage

●

0.5

V

CHGEN Output Pull-Up Current

–17.5

–10

–3.5

μA

CHGEN Input Low Voltage

●

0.9

V

CHGEN Input High Voltage

●

2.5

3.9

V

V

Power-On Reset Duration

100

μs

SMBus Timing (Refer to System Management Bus Specification, Revision 1.1, Section 2.1 for Timing Diagrams)

SCL Serial Clock High Period

●

4μs

SCL Serial Clock Low Period

●

4.7

15000

μs

SDA/SCL Rise Time

●

1000

ns

SDA/SCL Fall Time

●

300

ns

Start Condition Setup Time

●

4.7

μs

Start Condition Hold Time

●

4μs

SDA to SCL Falling-Edge Hold Time, Slave

Clocking in Data

●

300

ns

Time Between Receiving Valid ChargingCurrent()

and ChargingVoltage() Commands

●

140

175

210

sec

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: See Test Circuit.

Note 3: Does not include tolerance of current sense resistor.

Note 4: The LTC4100E is guaranteed to meet performance specifications

from 0°C to 70°C. Specifications over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls.

Note 5: Current accuracy dependent upon circuit compensation and sense

resistor.

SafetySignal.

Note 7: The corresponding overrange bit will be set when a HEX value

greater than or equal to this value is used.