AT697F datasheet(131/155 Pages) ATMEL

131 / 155 page

AT697F ADVANCE INFORMATION

131

7703C–AERO–6/09

t27

PIO[15:0] hold time during load

SDCLK +

t28

PIO[15:0] hold time during write

SDCLK +

t101

PCI_CLK Period

t102

13.5

PCI_CLK Low and High pulse width

t110

A/D[31:0] and C/BE[3:0] output delay

PCI_CLK +

t111

A/D[31:0] and C/BE[3:0] setup time

PCI_CLK +

t112

A/D[31:0] and C/BE[3:0] hold time

PCI_CLK +

t113

FRAME*, PAR, PERR*, SERR*, STOP* and DEVSEL* output delay

PCI_CLK +

t114

IRDY* and TRDY* output delay

PCI_CLK +

t115

REQ* output delay

PCI_CLK +

t116

FRAME*, LOCK*, PAR, PERR*, SERR*, IDSEL*, STOP* and DEVSEL*

setup time

PCI_CLK +

t117

IRDY* and TRDY* setup time

PCI_CLK +

t118

GNT* setup time

PCI_CLK +

t119

FRAME*, LOCK*, PAR, PERR*, SERR*, IDSEL*, STOP* and DEVSEL*

hold time

PCI_CLK +

t120

IRDY* and TRDY* hold time

PCI_CLK +

t121

GNT* hold time

PCI_CLK +

Parameter

Min

(ns)

Max

(ns)

Comment

Reference edge

(‘+’ for rising edge)

AT697F Datasheet(PDF) 131 Page - ATMEL Corporation

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