AT697F datasheet(135/155 Pages) ATMEL

135 / 155 page

AT697F ADVANCE INFORMATION

135

7703C–AERO–6/09

Timing Diagrams - Will be updated for production release

Diagram List

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Clock Input without PLL

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Clock Input with PLL

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Reset Sequence

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Fetch, Read and Write from/to 32-bit PROM - 0 Waitstate

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Fetch, Read and Write from/to 32-bit PROM - n Waitstates

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Fetch, Read and Write from/to 32-bit PROM - n Waitstates + BRDY*

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Fetch from 8-bit PROM with EDAC disabled - n Waitstates

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Word Write to 8-bit PROM with EDAC disabled - n Waitstates

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Byte and Half Word Write to 8-bit PROM with EDAC disabled - n Waitstates

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Fetch from 8-bit PROM with EDAC enabled - n Waitstates

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Fetch, Read and Write from/to 32-bit SRAM - 0 Waitstate

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Fetch, Read and Write from/to 32-bit SRAM - n Waitstates

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Burst of RAM Fetches and RAM Write Sequence - 0 Waitstate

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Burst of RAM Fetches and RAM Write Sequence - n Waitstates

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SDRAM Read (or Fetch) with Precharge - Burst length = 1; CL = 3

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SDRAM Write with Precharge - Burst length = 1; CL = 3

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Fetch from ROM, Read and Write from/to 32-bit I/O - 0 Waitstate

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Fetch from ROM, Read and Write from/to 32-bit I/O - n Waitstates

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Fetch from ROM, Read and Write from/to 32-bit I/O - n Waitstates + BRDY*

AT697F Datasheet(PDF) 135 Page - ATMEL Corporation

AT697F Datasheet(HTML) 135 Page - ATMEL Corporation

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