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DM9102DEP Datasheet(PDF) 61 Page - Davicom Semiconductor, Inc.

Part # DM9102DEP
Description  Single Chip Fast Ethernet NIC Controller
PDF  70 Pages
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Manufacturer  DAVICOM [Davicom Semiconductor, Inc.]
Direct Link  http://www.davicom.com.tw
Logo DAVICOM - Davicom Semiconductor, Inc.

DM9102DEP Datasheet(HTML) 61 Page - Davicom Semiconductor, Inc.

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Final
61
Version: DM9102D-DS-F01
May 10, 2006
8.4.5 TP Interface
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
tTR/F
100TX+/- Differential Rise/Fall Time
3.0
-
5.0
ns
tTM
100TX+/- Differential Rise/Fall Time
Mismatch
0
-
0.5
ns
tTDC
100TX+/- Differential Output Duty
Cycle Distortion
0
-
0.5
ns
tT/T
100TX+/- Differential Output
Peak-to-Peak Jitter
0
-
1.4
ns
XOST
100TX+/- Differential Voltage
Overshoot
0
-
5
%
8.4.6 Oscillator/Crystal Timing
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
tCKC
OSC Cycle Time
39.998
40
40.002
ns
+/-50ppm
TPWH
OSC Pulse Width High
16
20
24
ns
TPWL
OSC Pulse Width Low
16
20
24
ns
8.4.7 Auto-negotiation and Fast Link Pulse Timing Parameters
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
t1
Clock/Data Pulse Width
-
100
-
ns
t2
Clock Pulse To Data Pulse Period
55.5
62.5
69.5
us
DATA = 1
t3
Clock Pulse To Clock Pulse Period
111
125
139
us
t4
FLP Burst Width
-
2
-
ms
t5
FLP Burst To FLP Burst Period
8
16
24
ms
-
Clock/Data Pulses in a Burst
17
33
#
8.4.8 Fast Link Pulses
FAST LINK
PULSES
Clock Pulse
Data Pulse
Clock Pulse
t1
t2
t3
FLP Burst
FLP Burst
t4
t5
FLP Bursts
t1



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