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DM9102DEP Datasheet(PDF) 62 Page - Davicom Semiconductor, Inc. |
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DM9102DEP Datasheet(HTML) 62 Page - Davicom Semiconductor, Inc. |
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62 / 70 page ![]() 62 Final Version: DM9102D-DS-F01 May 10, 2006 9. Application Notes 9.1 Network Interface Signal Routing Place the transformer as close as possible to the RJ-45 connector. Place all the 50Ω resistors as close as possible to the DM9102D RX± and TX± pins. Traces routed from RX± and TX± to the transformer should run in close pairs directly to the transformer. The designer should be careful not to cross the transmit and receive pairs. As always, vias should be avoided as much as possible. The network interface should be void of any signals other than the TX± and RX± pairs between the RJ-45 to the transformer and the transformer to the DM9102D. There should be no power or ground planes in the area under the network side of the transformer to include the area under the RJ-45 connector (Refer to Figure 9-4-1 and 9-5). Keep chassis ground away from all active signals. The RJ-45 connector and any unused pins should be tied to chassis ground through a resistor divider network and a 2KV bypass capacitor. The Band Gap resistor should be placed as physically close to pin 101 and 102 as possible (refer to Figure 9-1 and 9-2 ). The designer should not run any high-speed signal near the Band Gap resistor placement. 9.2 10Base-T/100Base-TX Application Figure 9-1 |
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