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HT82K75REW Datasheet(PDF) 47 Page - Holtek Semiconductor Inc

Part # HT82K75REW
Description  2.4GHz Transceiver 8-Bit OTP MCU
PDF  103 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT82K75REW Datasheet(HTML) 47 Page - Holtek Semiconductor Inc

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HT82M75REW/HT82K75REW
Rev. 1.00
47
June 11, 2010
RF Transceiver PHY Block
The key features and the block diagram of the PHY layer
in RF Transceiver are listed as below.
Operating frequency range is from 2400MHz to
2495MHz.
It uses Offset QPSK (OQPSK) modulation to transmit
data at 250k/1M bps.
Direct Sequence Spreading Spectrum (DSSS) is used
in baseband algorithm to increase the SNR.
The RF Transceiver uses a fractional-N Phase-Locked
Loop (PLL) as frequency synthesizer. Therefore, 1MHz
channel spacing is supported and any integer carrier
frequency between 2400MHz to 2495MHz can be used.
The loop filters of PLL are integrated into the RF Trans-
ceiver except one external capacitor which should be
connected between the PLL loop filter external pin and
the ground. In order to keep the PLL stable, the board
layout around the PLL loop filter external capacitor pin
should be carefully designed to avoid EMI. The recom-
mended value of this external capacitor is 47pF.
Under 1M bps turbo mode, user can use the same pro-
gram settings of MAC and all MAC functions are re-
mained the same. Compare with 250k bps mode, in 1M
bps mode, signal bandwidth is extended to 8MHz.
The packet includes a 6 bytes PHY header and a 7~63
bytes PHY payload. The 6 bytes PHY header includes 4
bytes of preamble, 1 byte of start-of-frame delimiter
(SFD) and 1 byte of payload length. Preamble and SFD
are used for receiver packet detection and synchroniza-
tion. The Frame Length field specifies the length of the
PHY payload field. The valid length can be from 7 to 63
bytes. The frame format is shown as below:
T o L o w
M A C B l o c k
T o L o w e r
M A C B l o c k
B a s e b a n d
C i r c u i t
A D C
D A C
D A C
A D C
P L L
L N A
P A
M i x e r
P o l y p h a s e
F i l t e r
L i m i t i n g
A m p l i f i e r
R F I O
PHY Block architecture
P r e a m b l e
P H Y P a y l o a d
4 b y t e s
1 b y t e
1 b y t e
7 ~ 6 3 b y t e s
S t a r t o f F r a m e
D e l i m i t e r
F r a m e
L e n g t h
P H Y H e a d e r
PHY Layer Frame Format



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