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HT82K75REW Datasheet(PDF) 59 Page - Holtek Semiconductor Inc |
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HT82K75REW Datasheet(HTML) 59 Page - Holtek Semiconductor Inc |
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59 / 103 page  HT82M75REW/HT82K75REW Rev. 1.00 59 June 11, 2010 · Registers associated with Initialization Addr. File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR 0x17 PACON r r r PAONTS3 PAONTS2 PAONTS1 PAONTS0 r 0000 0010 0x18 TXCON r r TXONTS3 TXONTS2 TXONTS1 TXONTS0 r r 1000 1000 0x26 GATECLK r r SPISYNC r r ENTXM r r 0000 0000 0x2A SOFTRST r r rrrr RSTBB RSTMAC 0000 0000 0x2E TXPEMISP TXPET3 TXPET2 TXPET1 TXPET0 rrrr 0111 0101 0x32 INTMSK r WAKEMSK r r RXMSK r r TXNMSK 1111 1111 0x36 RFCTL r r r WAKECNT8 WAKECNT7 RFRST r r 0000 0000 0x200 RFCTRL0 CHANNEL3 CHANNEL2 CHANNEL1 CHANNEL0 rrrr 0000 0001 0x201 RFCTRL1 r r rrrr VCORX1 VCORX0 0000 0001 0x202 RFCTRL2 r RXFC0-1 RXFC0-0 rrrrr 1000 0100 0x204 RFCTRL4 r r r r r RXFCO RXD2CO1 RXD2CO0 0000 0000 0x206 RFCTRL6 TXFBW1 TXFBW0 32MXCO1 32MXCO0 BATEN r r r 1111 0000 0x207 RFCTRL7 r r r RXFC2 rrrr 0000 0000 0x208 RFCTRL8 r TXD2CO0 rrrrrr 0000 1100 0x23D GPIODIR r r GDIRCTRL2 GDIRCTRL1 GDIRCTRL0 GPIO2DIR GPIO1DIR GPIO0DIR 0011 1111 0x250 RFCTRL50 r r r DCPOC DCOPC3 DCOPC2 DCOPC1 DCOPC0 0000 0000 0x251 RFCTRL51 DCOPC5 DCOPC4 rrrrrr 0000 0000 0x252 RFCTRL52 SLCTRL6 SLCTRL5 SLCTRL4 SLCTRL3 SLCTRL2 SLCTRL1 SLCTRL0 32MXCTRL 1111 1111 0x259 RFCTRL59 r r rrrrr PLLOPT3 0000 0001 0x273 RFCTRL73 VCOTXOPT1 VCOTXOPT0 r r PLLOPT2 PLLOPT1 PLLOPT0 r 0000 0000 0x274 RFCTRL74 PACEN0 PACTRL0-2 PACTRL0-1 PACTRL0-0 PACEN1 PACTRL1-2 PACTRL1-1 PACTRL1-0 1100 1010 0x275 RFCTRL75 r r r r SCLKOPT3 SCLKOPT2 SCLKOPT1 SCLKOPT0 0001 0101 0x276 RFCTRL76 r r r r r SCLKOPT6 SCLKOPT5 SCLKOPT4 0000 0001 Change RF Channel Procedure The RF Transceiver operates in 2.4GHz ISM band. The operating frequency is divided into 16 channels. The proce- dure to change the channels is described as below. · Set the RF channel. Users can select one of the channels by configuring either LREG0x200 or LREG0x254. · Turn on the TX MAC gated clock by setting SREG0x26 [2] to 1. To avoid an incomplete acknowledgment frame transmission happen during RF state machine reset period. · Reset RF Transceiver state machine by setting SREG0x36 [2] to 1 and then set SREG0x36 [2] back to 0. · After RF Transceiver reset, delay for a while to ensure the acknowledgment frame, if any, is successfully transmitted. 250 kbps mode: delay 550 ms 1M bps mode: delay 300 ms · To disable the TX MAC gated clock by setting SREG26 [2] to 0. Registers associated with Change Channel Procedure. Addr. File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR 0x26 GATECLK r r SPISYNC r r ENTXM r r 0000 0000 0x36 RFCTL r r r WAKECNT8 WAKECNT7 RFRST r r 0000 0000 0x200 RFCTRL0 CHANNEL3 CHANNEL2 CHANNEL1 CHANNEL0 r r r r 0000 0001 0x254 RFCTRL54 1MCSEN 1MFRCH6 1MFRCH5 1MFRCH4 1MFRCH3 1MFRCH2 1MFRCH1 1MFRCH0 0000 0000 |
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