HT82K75REW datasheet(57/103 Pages) HOLTEK

57 / 103 page

HT82M75REW/HT82K75REW

Rev. 1.00

June 11, 2010

The SPI burst mode is provided for the access of long address memory space on a continuous basis. If SEN does

not go high after the 8-bit write data and the SCLK continuously toggles, the followed 8-bit write data is written to

the next address field. Same for the read access, the data of the next address will be read. The SPI burst mode is

only available for the long-address mode.

A9 A8

A5 A4 A3

A10

DR7DR6

DR4

DR5

DR3DR2

DR0

DR1

A9 A8

A5 A4 A3

A10

Dw7

Dw6Dw5

Dw3

Dw4

Dw2

SCLK

SEN

tSP

tSD

tHD

tCH

tCL

tNS

read long address data

writelongaddressdata

DR7

DR5

DR6

Dw1Dw0

Dw6

Dw7

Dw5 D

A2 A1 0

DR4

Timing Diagram of Long Addressing Mode

GPIO

The RF Transceiver has 3 digital GPIO pins. Each GPIO

pins can be configured as input or output by

LREG0x23D respectively. When being configured as an

output pad, the driving capability is 4mA for GPIO0 and

1mA for GPIO1 and GPIO2. The status of these pins

can be configured or read by LREG0x23E.

To benefit wide rang applications, GPIO0, GPIO1 and

GPIO2 can be configured to control the external Power

Amplifier (P.A.) and RF switch according to the current

RF state automatically. Please refer to the following sec-

tion named

²External Power Amplifier Configuration² for

details.

Interrupt Signal

The RF Transceiver provides an interrupt output pin

named INT and the polarity of the interrupt signal is

selectable. The RF Transceiver issues interrupts to the

MCU host on three possible events. If one of the three

events happens, the RF Transceiver sets the corre-

sponding status bit in SREG0x31. If the corresponding

interrupt mask in SREG0x32 is clear (i.e. equals 0), an

interrupt will be issued on the interrupt output pin INT. If

the corresponding interrupt mask is set to 1 (masked),

no interrupt will be issued, but the status is still present.

Whenever the SREG0x31 register is read, the interrupt

and the status are cleared. The three interrupt events

are described as below:

· Wake-up Alert Interrupt (WAKEIF): Each time a

wake-up event happens the RF Transceiver issues

the interrupt event.

· Packet Received Interrupt (RXIF): This interrupt is is-

sued when an available packet is received in the

RXFIFO. An available packet means that it passes a

RXMAC filter, which includes frame type identifying,

address filtering and FCS check.

· TX FIFO Release Interrupt (TXNIF): This interrupt can

be issued in two possible conditions. The two condi-

tions are when a packet in TXFIFO is triggered and

sent successfully, or when a packet is triggered and

the retransmission is timed out.

HT82K75REW Datasheet(PDF) 57 Page - Holtek Semiconductor Inc

HT82K75REW Datasheet(HTML) 57 Page - Holtek Semiconductor Inc

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