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HT82K75REW Datasheet(PDF) 80 Page - Holtek Semiconductor Inc |
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HT82K75REW Datasheet(HTML) 80 Page - Holtek Semiconductor Inc |
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80 / 103 page  HT82M75REW/HT82K75REW Rev. 1.00 80 June 11, 2010 · LREG0x253 - RFCTRL53: RF Control Register 53 Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Name ¾ FIFOPS DIGITALPS P32MXE PACEN2 PACTRL2-2 PACTRL2-1 PACTRL2-0 Type R/W R/W R/W R/W RRRR POR 00000000 Bit 7 Reserved: Maintain as ²0b0² Bit 6 FIFOPS: FIFO Power while the RF Transceiver is in Power Saving Mode 1: GND 0: VDD (default) Bit 5 DIGITALPS: Digital Power while Sleep 1: GND 0: VDD (default) Bit 4 P32MXE: Partial 32MHz Clock Enable 1: Enable 0: Disable (default) Bit 3 PACEN2: Power Amplifier Control 2 Enable 1: Enable 0: Disable (default) Bit 2~0 PACTRL2-[2:0]: Power Amplifier Control 2 000: (default) PACTRL2 [2:0] is for 1st stage Power Amplifier current fine tuning. Please follow the TX Output Power Configuration Summary Table in LREG0x203 Register definition. |
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