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ADT7476ARQZ-R7 Datasheet(PDF) 60 Page - ON Semiconductor |
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ADT7476ARQZ-R7 Datasheet(HTML) 60 Page - ON Semiconductor |
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60 / 67 page ![]() ADT7476 http://onsemi.com 60 Table 38. XNOR Tree Test Enable Register Address R/W (Note 1) Description Power−On Default 0x6F R/W XNOR tree test enable register. 0x00 [0] XEN If the XEN bit is set to 1, the device enters the XNOR tree test mode. Clearing the bit removes the device from the XNOR tree test mode. [7:1] Reserved Unused. Do not write to these bits. 1. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to this register have no effect. Table 39. Remote 1 Temperature Offset (Note 1) Register Address R/W (Note 1) Description Power−On Default 0x70 R/W Remote 1 temperature offset. 0x00 [7:0] R/W Allows a temperature offset to be automatically applied to the Remote Temperature 1 channel measurement. Bit 1 of Configuration Register 5 (0x7C) determines the range and resolution of this register. 1. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to this register have no effect. Table 40. Local Temperature Offset (Note 1) Register Address R/W (Note 1) Description Power−On Default 0x71 R/W Local temperature offset. 0x00 [7:0] R/W Allows a temperature offset to be automatically applied to the local temperature measurement. Bit 1 of Configuration Register 5 (0x7C) determines the range and resolution of this register. 1. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to this register have no effect. Table 41. Remote 2 Temperature Offset (Note 1) Register Address R/W (Note 1) Description Power−On Default 0x72 R/W Remote 2 temperature offset. 0x00 [7:0] R/W Allows a temperature offset to be automatically applied to the Remote Temperature 2 channel measurement. Bit 1 of Configuration Register 5 (0x7C) determines the range and resolution of this register. 1. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to this register have no effect. |
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