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ADT7476

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Figure 27. Measuring Temperature Using an

PNP Transistor

2N3906

PNP

ADT7476

D+

D–

To measure

DVBE, the sensor switches between operating

currents of I and N x I. The resulting waveform passes

through a 65 kHz low−pass filter to remove noise and through

a chopper−stabilized amplifier. The amplifier performs the

amplification and rectification of the waveform to produce a

dc voltage proportional to

DVBE. This voltage is measured by

the ADC to give a temperature output in 10−bit, twos

complement format. To further reduce the effects of noise,

digital filtering is performed by averaging the results of 16

measurement cycles.

A remote temperature measurement takes nominally

38 ms. The results of remote temperature measurements are

stored in 10−bit, twos complement format, as illustrated in

Table 10. The extra resolution for the temperature

measurements is held in the Extended Resolution Register 2

(0x77). This gives temperature readings with a resolution of

0.25

°C.

Noise Filtering

For temperature sensors operating in noisy environments,

previous practice placed a capacitor across the D+ pin and

the D− pin to help combat the effects of noise. However,

large capacitances affect the accuracy of the temperature

measurement, leading to a recommended maximum

capacitor value of 1000 pF.

This capacitor reduces the noise but does not eliminate it,

which makes using the sensor difficult in a very noisy

environment. In most cases, a capacitor is not required

because differential inputs by their very nature have a high

immunity to noise.

Factors Affecting Diode Accuracy

Remote Sensing Diode

The ADT7476 is designed to work with substrate

transistors built into processors or with discrete transistors.

Substrate transistors are generally PNP types with the

collector connected to the substrate. Discrete types can be

either PNP or NPN transistors connected as a diode

(base−shorted to the collector). If an NPN transistor is used,

the collector and base are connected to D+ and the emitter

to D−. If a PNP transistor is used, the collector and base are

connected to D− and the emitter is connected to D+.

To reduce the error due to variations in both substrate and

discrete transistors, a number of factors should be taken into

consideration:

• The ideality factor, nf, of the transistor is a measure of

the deviation of the thermal diode from ideal behavior.

The ADT7476 is trimmed for an nf value of 1.008. Use

the following equation to calculate the error introduced

at a temperature T (

°C), when using a transistor whose

nf does not equal 1.008 (see the processor’s data sheet

for the nf values):

DT + (nf * 1.008)

273.15 K ) T

(eq. 2)

To factor this in, the user can write the

DT value to the

offset register. The ADT7476 then automatically adds

it to or subtracts it from the temperature measurement.

• Some CPU manufacturers specify the high and low

current levels of the substrate transistors. The high

current level of the ADT7476, IHIGH, is 180 mA, and

the low level current, ILOW, is 11 mA. If the ADT7476

current levels do not match the current levels specified

by the CPU manufacturer, it could be necessary to

remove an offset. The CPU’s data sheet advises

whether this offset needs to be removed and how to

calculate it. This offset can be programmed to the offset

offset must be considered, then the algebraic sum of

these offsets must be programmed to the offset register.

If a discrete transistor is used with the ADT7476, the best

accuracy is obtained by choosing devices according to the

following criteria:

• Base−emitter voltage greater than 0.25 V at 11 mA, at

the highest operating temperature.

• Base−emitter voltage less than 0.95 V at 180 mA,

at the lowest operating temperature.

• Base resistance less than 100 W.

• Small variation in the current gain, hFE, (approximately

50 to 150) that indicates tight control of VBE

characteristics.

Transistors, such as 2N3904, 2N3906, or equivalents in

SOT−23 packages, are suitable devices to use.

Nulling Out Temperature Errors

As CPUs run faster, it is more difficult to avoid high

frequency clocks when routing the D+/D– traces around a

system board. Even when recommended layout guidelines

are followed, some temperature errors can still be

attributable to noise coupled onto the D+/D– lines. Constant

high frequency noise usually attenuates, or increases,

temperature measurements by a linear, constant value.

The ADT7476 has temperature offset registers (0x70 and

0x72) for the Remote 1 and Remote 2 temperature channels.

By doing a one−time calibration of the system, the user can

determine the offset caused by system board noise and null

it out using the offset registers. The offset registers

automatically add a twos complement 8−bit reading to every

temperature measurement.

Changing Bit 1 of Configuration Register 5 (0x7C)

changes the resolution and therefore, the range of the

temperature offset as either having a −63

°C to +127°C range

with a resolution of 1

°C or having a −63°C to +64°C range

with a resolution of 0.5

°C. This temperature offset can be

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