| Electronic Components Datasheet Search |
|
TLK6002 Datasheet(PDF) 53 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TLK6002 Datasheet(HTML) 53 Page - Texas Instruments |
|
53 / 96 page ![]() TLK6002 www.ti.com SLLSE34 – MAY 2010 Table 3-13. SERDES_CONTROL_1 Address: 0x08 Default: 0x3D4C BIT(s) NAME DESCRIPTION ACCESS 8.14:12 EQPRE[2:0] Serdes Rx precursor equalizer selection RW 000 = 1/9 cursor amplitude 001 = 3/9 cursor amplitude 010 = 5/9 cursor amplitude 011 = 7/9 cursor amplitude (Default 3’b011) 100 = 9/9 cursor amplitude 101 = 11/9 cursor amplitude 110 = 13/9 cursor amplitude 111 = Disable 8.11:10 CDRTHR[1:0] Clock data recovery algorithm threshold selection RW 00 = Four vote threshold 01 = Eight vote threshold 10 = Sixteen vote threshold 11 = Thirty two vote threshold (Default 2’b11) 8.9:8 CDRFMULT[1:0] Clock data recovery algorithm frequency multiplication selection RW 00 = First order. Frequency offset tracking disabled 01 = Second order. 1x mode (Default 2’b01) 10 = Second order. 2x mode 11 = Reserved 8.7:6 AGCCTRL[1:0] Adaptive gain control loop RW 00 = Attenuator will not change after lock has been achieved, even if AGC becomes unlocked 01 = Attenuator will not change when in lock state, but could change when AGC becomes unlocked (Default 2’b01) 10 = Force the attenuator off. 11 = Force the attenuator on 8.5:4 AZCAL[1:0] Auto zero calibration. RW 00 = Auto zero calibration initiated when receiver is enabled (Default 2’b00) 01 = Auto zero calibration disabled 10 = Forced with automatic update. 11 = Forced without automatic update 8.3 TX_PMA_BIT_ORDER Determines whether LSB or MSB of the parallel inputs to be sent out first on serial RW transmit pins. 0 = TDx[19] or TDx[9] (MSB) is serially transmitted first 1 = TDx[10] or TDx[0] (LSB) is serially transmitted first (Default 1’b1) 8.2 RX_PMA_BIT_ORDER Determines whether serially received first bit to be sent out on LSB or MSB of the parallel RW outputs. 0 = RDx[19] or RDx[9] (MSB) is serially received first 1 = RDx[10] or RDx[0] (LSB) is serially received first (Default 1’b1) 8.1 TX_INVPAIR Transmitter polarity. RW 0 = Normal polarity. TXxP considered positive data and TXxN considered negative data (Default 1’b0) 1 = Inverted polarity. TXxP considered negative data and TXxN considered positive data 8.0 RX_INVPAIR Receiver polarity. RW 0 = Normal polarity. RXxP considered positive data. RXxN considered negative data (Default 1’b0) 1 = Inverted polarity. RXxP considered negative data. RXxN considered positive data Table 3-14. SCRAMBLER_CONTROL Address: 0x09 Default: 0x0000 BIT(s) NAME DESCRIPTION ACCESS 9.15 TX_SCRAMBLER_EN 0 = Disables scrambler on the transmit datapath (Default 1’b0) RW 1 = Enables scrambler on the transmit datapath 9.14:8 TX _SCRAMBLER_SEED[6:0] 7 bit scrambler seed used when TX scrambler is enabled. RW (Default 7’b0000000) 9.7 RX_DESCRAMBLER_EN 0 = Disables De-scrambler on the receive datapath (Default 1’b0) RW 1 = Enables De-scrambler on the receive datapath 9.6:0 RX_DESCRAMBLER_SEED[6:0] 7 bit De-scrambler seed used when RX De-scrambler is enabled. RW (Default 7’b0000000) Copyright © 2010, Texas Instruments Incorporated PROGRAMMERS REFERENCE 53 Submit Documentation Feedback Product Folder Link(s): TLK6002 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |