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EPCS4 Datasheet(PDF) 22 Page - Altera Corporation |
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EPCS4 Datasheet(HTML) 22 Page - Altera Corporation |
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22 / 38 page ![]() 3–22 Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet Serial Configuration Device Memory Access Configuration Handbook (Complete Two-Volume Set) © December 2009 Altera Corporation Read Silicon ID Operation The read silicon ID operation code is b'1010 1011, with the MSB listed first. Only EPCS1, EPCS4, EPCS16, and EPCS64 support this operation. It reads the serial configuration device’s 8-bit silicon ID from the DATA output pin. If this operation is shifted in during an erase or write cycle, it is ignored and has no effect on the cycle that is in progress. Table 3–14 lists the serial configuration device silicon IDs. The device implements the read silicon ID operation by driving nCS low then shifting in the read silicon ID operation code followed by three dummy bytes on ASDI. The serial configuration device’s 8-bit silicon ID is then shifted out on the DATA pin on the falling edge of DCLK, as shown in Figure 3–13. The device can terminate the read silicon ID operation by driving nCS high after the silicon ID has been read at least once. Sending additional clock cycles on DCLK while nCS is driven low can cause the silicon ID to be shifted out repeatedly. Table 3–14. Serial Configuration Device Silicon ID Serial Configuration Device Silicon ID (Binary Value) EPCS1 b'0001 0000 EPCS4 b'0001 0010 EPCS16 b'0001 0100 EPCS64 b'0001 0110 Figure 3–13. Read Silicon ID Operation Timing Diagram (Note 1) Note to Figure 3–13: (1) Only EPCS1, EPCS4, EPCS16, and EPCS64 support Read Silicon ID operation. nCS DCLK ASDI DATA 0 1 2 3 4 5 6 7 8 9 10 28 29 30 31 32 33 34 35 36 37 38 39 Operation Code Three Dummy Bytes 23 22 21 3 2 1 0 765 43 210 MSB MSB High Impedance Silicon ID |
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