EPCS4 datasheet(34/38 Pages) ALTERA

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Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet

Package

Configuration Handbook (Complete Two-Volume Set)

Altera Corporation

As shown in Figure 3–21 and Figure 3–22, the serial configuration device is an 8-pin or

16-pin device. In order to take advantage of vertical migration from EPSCS1 to

EPCS128, Altera recommends a layout for serial configuration devices.

Package

EPCS1 and EPCS4 available in 8-pin small outline integrated circuit (SOIC) package.

EPCS16 available in 8-pin and 16-pin small outline integrated circuit (SOIC) packages.

EPCS64 and EPCS128 available in 16-pin small outline integrated circuit (SOIC)

package.

f For more information about Altera device packaging including mechanical drawing

and specifications for this package, refer to the Altera Device Package Information Data

Sheet.

nCS

Input

The active low chip select input signal toggles at the beginning and

end of a valid instruction. When this signal is high, the device is

deselected and the DATA pin is tri-stated. When this signal is low, it

enables the device and puts the device in an active mode. After power

up, the serial configuration device requires a falling edge on the nCS

signal before beginning any operation.

DCLK

Input

DCLK

is provided by the FPGA. This signal provides the timing of the

serial interface. The data presented on ASDI is latched to the serial

configuration device on the rising edge of DCLK. Data on the DATA

pin changes after the falling edge of DCLK and is latched into the

FPGA on the next falling edge.

VCC

3, 7, 8

1, 2, 9

Power

Power pins connect to 3.3 V.

GND

Ground

Ground pin.

Table 3–23. Serial Configuration Device Pin Description (Part 2 of 2)

Name

Pin Number

in 8-Pin

SOIC

Package

Pin Number

in 16-Pin

SOIC

Package

Pin Type

Description

Figure 3–23. Layout Recommendation for Vertical Migration from EPCS1 to EPCS128

Pin 1 ID

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