3–4

　　　　

Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet

Active Serial FPGA Configuration

Configuration Handbook (Complete Two-Volume Set)

© December 2009

Altera Corporation

There are four signals on the serial configuration device that interface directly with

the FPGA’s control signals. The serial configuration device signals DATA, DCLK, ASDI,

and nCS interface with DATA0, DCLK, ASDO, and nCSO control signals on the FPGA,

respectively. Figure 3–2 shows a serial configuration device programmed via a

download cable, which configures an FPGA in AS mode. Figure 3–3 shows a serial

configuration device programmed using the APU or a third-party programmer

configuring an FPGA in AS configuration mode.

Table 3–23.

Figure 3–2. Altera FPGA Configuration in AS Mode (Serial Configuration Device Programmed Using Download Cable)

(Note 1) , (4)

Notes to Figure 3–2:

(2) Serial configuration devices cannot be cascaded.

(3) Connect the FPGA MSEL[] input pins to select the AS configuration mode. For details, refer to the respective FPGA family chapter in the

Configuration Handbook.

(4) For more information about configuration pin I/O requirements in an AS scheme for an Altera FPGA, refer to the respective FPGA family handbook

Configuration chapter.

DATA

DCLK

nCS

ASDI

DATA0

DCLK

nCSO

nCE

nCONFIG

nSTATUS

MSEL[]

nCEO

CONF_DONE

ASDO

10 k



10 k



10 k



10 k



(3)

Altera FPGA

Serial

Configuration

Device (2)

Pin 1

N.C.