CY8C52 datasheet(20/94 Pages) CYPRESS

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PRELIMINARY

PSoC® 5: CY8C52 Family Datasheet

Document Number: 001-66236 Rev. **

Page 20 of 94

The central timewheel can be programmed to wake the system

periodically and optionally issue an interrupt. This enables

flexible, periodic wakeups from low power modes or coarse

timing applications. Systems that require accurate timing should

use the RTC capability instead of the central timewheel.

The 100 KHz clock (CLK100K) works as a low-power system

clock to run the CPU. It can also generate time intervals such as

fast sleep intervals using the fast timewheel. The fast timewheel

is a 100 KHz, 5-bit counter clocked by the ILO that can also be

used to wake the system. The fast timewheel settings are

programmable, and the counter automatically resets when the

terminal count is reached. This enables flexible, periodic

wakeups of the CPU at a higher rate than is allowed using the

central timewheel. The fast timewheel can generate an optional

interrupt each time the terminal count is reached.

The 33 KHz clock (CLK33K) comes from a divide-by-3 operation

on CLK100K. This output can be used as a reduced accuracy

version of the 32.768 KHz ECO clock with no need for a crystal.

6.1.2 External Oscillators

6.1.2.1 MHz External Crystal Oscillator

The MHzECO provides high frequency, high precision clocking

using an external crystal (see Figure 6-2). It supports a wide

variety of crystal types, in the range of 4 to 25 MHz. When used

in conjunction with the PLL, it can generate CPU and system

clocks up to the device's maximum frequency (see Internal Low

Speed Oscillator). The GPIO pins connecting to the external

crystal and capacitors are fixed. If a crystal is not used then Xi

must be shorted to ground and Xo must be left floating. MHzECO

accuracy depends on the crystal chosen.

Figure 6-2. MHzECO Block Diagram

6.1.2.2 32.768 kHz ECO

The 32.768 KHz external crystal oscillator (32kHzECO) provides

precision timing with minimal power consumption using an

external 32.768 KHz watch crystal (see Figure 6-3). The

32kHzECO also connects directly to the sleep timer and provides

the source for the RTC. The RTC uses a 1-second interrupt to

implement the RTC functionality in firmware.

The oscillator works in two distinct power modes. This allows you

to trade off power consumption with noise immunity from

neighboring circuits. The GPIO pins connected to the external

crystal and capacitors are fixed.

Figure 6-3. 32kHzECO Block Diagram

6.1.2.3 Digital System Interconnect

The DSI provides routing for clocks taken from external clock

oscillators connected to I/O. The oscillators can also be

generated within the device in the digital system and UDBs.

While the primary DSI clock input provides access to all clocking

resources, up to eight other DSI clocks (internally or externally

generated) may be routed directly to the eight digital clock

dividers. This is only possible if there are multiple precision clock

sources.

6.1.3 Clock Distribution

All seven clock sources are inputs to the central clock distribution

system. The distribution system is designed to create multiple

high precision clocks. These clocks are customized for the

design’s requirements and eliminate the common problems

found with limited resolution prescalers attached to peripherals.

The clock distribution system generates several types of clock

trees.

The system clock is used to select and supply the fastest clock

in the system for general system clock requirements and clock

synchronization of the PSoC device.

Bus Clock 16-bit divider uses the system clock to generate the

system’s bus clock used for data transfers and the CPU. The

CPU clock is directly derived from the bus clock.

Eight fully programmable 16-bit clock dividers generate digital

system clocks for general use in the digital system, as

configured by the design’s requirements. Digital system clocks

can generate custom clocks derived from any of the seven

clock sources for any purpose. Examples include baud rate

generators, accurate PWM periods, and timer clocks, and

many others. If more than eight digital clock dividers are

required, the Universal Digital Blocks (UDBs) and fixed function

timer/counter/PWMs can also generate clocks.

4- 25 MHz

Crystal Osc

XCLK_ MHZ

4 – 25 MHz

crystal

Capacitors

External

Components

4- 25 MHz

Crystal Osc

XCLK_ MHZ

4 – 25 MHz

crystal

Capacitors

External

Components

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