CYUSB3014 datasheet(5/38 Pages) CYPRESS

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PRELIMINARY

CYUSB3014

Document Number 001-52136 Rev. *H

Page 5 of 38

OTG Connectivity

In OTG mode, EZ-USB FX3 can be configured to be A, B, or dual

role device. It is able to connect to:

■ ACA device

■ Targeted USB peripheral

■ SRP capable USB peripheral

■ HNP capable USB peripheral

■ OTG host

■ HNP capable host

■ OTG device

ReNumeration

Because EZ-USB FX3's configuration is soft, one chip can take

on the identities of multiple distinct USB devices.

When first plugged into USB, EZ-USB FX3 enumerates

automatically with the Cypress Vendor ID (0x04B4) and

downloads firmware and USB descriptors over the USB

interface. The downloaded firmware executes a electrical

disconnect and connect. EZ-USB FX3 enumerates again, this

time as a device defined by the downloaded information. This

patented two step process called ReNumeration happens

instantly when the device is plugged in.

EZ-Dtect

EZ-USB FX3 supports USB Charger and accessory detection

(EZ-Dtect). The charger detection mechanism is in compliance

with the Battery Charging Specification Revision 1.1. In addition

to supporting this version of the specification EZ-USB FX3 also

provides hardware support to detect the resistance values on the

ID pin.

The following are the resistance ranges that EZ-USB FX3 can

detect:

■ Less than 10 Ω

■ Less than 1 kΩ

■ 65 kΩ to 72 kΩ

■ 35 kΩ to 39 kΩ

■ 99.96 kΩ to 104.4 kΩ (102 kΩ ± 2%)

■ 119 kΩ to 132 kΩ

■ Higher than 220 kΩ

■ 431.2 kΩ to 448.8 kΩ (440 kΩ ± 2%)

EZ-USB FX3's charger detection feature detects a dedicated

wall charger, Host/Hub charger, and Host/Hub.

VBUS Overvoltage Protection

The maximum input voltage on EZ-USB FX3's VBUS pin is 6V.

A charger can supply up to 9V on VBUS, in this case, it is

necessary to have an external Over voltage Protection (OVP)

device to protect EZ-USB FX3 from damage on VBUS. Figure 4

shows the system application diagram with an OVP device

connected on VBUS. Please refer to Table 7DC Specifications

for the operating range of VBUS and VBATT.

Figure 4. System Diagram with OVP Device For VBUS

Carkit UART Mode

The USB interface supports Carkit UART mode (UART over

D+/D-) for non-USB serial data transfer. This is based on the

CEA-936A specification.

In Carkit UART mode, the output signaling voltage is 3.3V. When

configured for Carkit UART mode, TXD of UART (output) is

mapped to D- line, and RXD of UART (input) is mapped to D+

line.

In Carkit mode, EZ-USB FX3 disables the USB transceiver and

D+ and D- pins serve as pass through pins to connect to the

UART of the host processor. The Carkit UART signals may be

routed to the GPIF II interface or to GPIO[48] and GPIO[49] as

shown in Figure 5 on page 6.

A rate of up to 9600 bps is supported by EZ-USB FX3 in this

mode.

POWER SUBSYSTEM

EZ-USB FX3

VBUS

GND

SSRX-

SSRX+

SSTX-

SSTX+

D-

D+

OTG_ID

OVP device

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