MSP430F4783IPZ datasheet(7/79 Pages) TI

7 / 79 page

MSP430F47x3, MSP430F47x4

MIXED SIGNAL MICROCONTROLLER

SLAS545C − MAY 2007 − REVISED MARCH 2011

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

Terminal Functions (Continued)

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

P2.5/

UCA0RXD/UCA0SOMI

I/O

General-purpose digital I/O / USCI_A0 receive data input in UART mode, slave out/master in in SPI

mode

P2.4/

UCA0TXD/UCA0SIMO

I/O

General-purpose digital I/O / USCI_A0 transmit data output in UART mode, slave in/master out in

SPI mode

P2.3/TB2

I/O

General-purpose digital I/O / Timer_B3 CCR2. Capture: CCI2A/CCI2B input, compare: Out2 output

P2.2/TB1

I/O

General-purpose digital I/O / Timer_B3 CCR1. Capture: CCI1A/CCI1B input, compare: Out1 output

P2.1/TB0

I/O

General-purpose digital I/O / Timer_B3 CCR0. Capture: CCI0A/CCI0B input, compare: Out0 output

P2.0/TA2

I/O

General-purpose digital I/O / Timer_A Capture: CCI2A input, compare: Out2 output

P1.7/CA1

I/O

General-purpose digital I/O / Comparator_A input

P1.6/CA0

I/O

General-purpose digital I/O / Comparator_A input

P1.5/TACLK/

ACLK

I/O

General-purpose digital I/O / Timer_A, clock signal TACLK input /

ACLK output (divided by 1, 2, 4, or 8)

P1.4/TBCLK/

SMCLK

I/O

General-purpose digital I/O / input clock TBCLK—Timer_B3 /

submain system clock SMCLK output

P1.3/TBOUTH/

SVSOUT

I/O

General-purpose digital I/O / switch all PWM digital output ports to high impedance—Timer_B3 TB0

to TB2 / SVS: output of SVS comparator

P1.2/TA1

I/O

General-purpose digital I/O / Timer_A, Capture: CCI1A input, compare: Out1 output

P1.1/TA0/MCLK

I/O

General-purpose digital I/O / Timer_A. Capture: CCI0B input / MCLK output.

Note: TA0 is only an input on this pin / BSL receive

P1.0/TA0

I/O

General-purpose digital I/O / Timer_A. Capture: CCI0A input, compare: Out0 output / BSL transmit

XT2OUT

Output terminal of crystal oscillator XT2

XT2IN

Input port for crystal oscillator XT2. Only standard crystals can be connected.

TDO/TDI

I/O

Test data output port. TDO/TDI data output or programming data input terminal

TDI/TCLK

Test data input or test clock input. The device protection fuse is connected to TDI/TCLK.

TMS

Test mode select. TMS is used as an input port for device programming and test.

TCK

Test clock. TCK is the clock input port for device programming and test.

RST/NMI

Reset input or nonmaskable interrupt input port

P5.0/SVSIN

I/O

General-purpose digital I/O / analog input to supply voltage supervisor

A3.0+

(MSP430x47x4 only)

SD16_A positive analog input A3.0 (see Note 2)

Not connected in MSP430x47x3 devices, open connection recommended.

A3.0−

(MSP430x47x4 only)

SD16_A negative analog input A3.0 (see Note 2)

Not connected in MSP430x47x3 devices, open connection recommended.

AVSS

Analog supply voltage, negative terminal.

DVSS1

Digital supply voltage, negative terminal.

AVCC

100

Analog supply voltage, positive terminal. Must not power up prior to DVCC1/DVCC2.

NOTE 2: Open connection recommended for all unused analog inputs.

MSP430F4783IPZ Datasheet(PDF) 7 Page - Texas Instruments

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