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MSP430F4783IPZ Datasheet(PDF) 24 Page - Texas Instruments

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Part # MSP430F4783IPZ
Description  MIXED SIGNAL MICROCONTROLLER
PDF  79 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

MSP430F4783IPZ Datasheet(HTML) 24 Page - Texas Instruments

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MSP430F47x3, MSP430F47x4
MIXED SIGNAL MICROCONTROLLER
SLAS545C − MAY 2007 − REVISED MARCH 2011
24
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage during program execution,
VCC (AVCC = DVCC = VCC) (see Note 1)
1.8
3.6
V
Supply voltage during program execution, SVS enabled, PORON = 1,
VCC (AVCC = DVCC = VCC) (see Notes 1, 2)
2.0
3.6
V
Supply voltage during program/erase flash memory,
VCC (AVCC = DVCC = VCC) (see Note 1)
2.2
3.6
V
Supply voltage, VSS
0
V
Operating free-air temperature range, TA
−40
85
°C
VCC = 1.8 V,
Duty Cycle = 50%
±10%
dc
4.15
MHz
Processor frequency fSYSTEM (Maximum MCLK frequency)
VCC = 2.2 V,
Duty Cycle = 50%
±10%
dc
7.5
MHz
Processor frequency fSYSTEM (Maximum MCLK frequency)
(see Notes 3, 4 and Figure 1)
VCC = 2.7 V,
Duty Cycle = 50%
±10%
dc
12
MHz
VCC ≥ 3.3 V,
Duty Cycle = 50%
±10%
dc
16
MHz
NOTES:
1. It is recommended to power AVCC and DVCC from the same source. A maximum difference of 0.3V between AVCC and DVCC can
be tolerated during power up and operation.
2. The minimum operating supply voltage is defined according to the trip point where POR is going active by decreasing supply voltage.
POR is going inactive when the supply voltage is raised abve minimum supply voltage plus the hysteresis of the SVS circuitry.
3. The MSP430 CPU is clocked directly with MCLK.
Both the high and low phase of MCLK must not exceed the pulse width of the specified maximum frequency.
4. Modules might have a different maximum input clock specification. Refer to the specification of the respective module in this
datasheet.
4.15 MHz
12 MHz
16 MHz
1.8 V
2.2 V
2.7 V
3.3 V
3.6 V
Supply Voltage −V
Supply voltage range,
during flash memory
programming
Supply voltage range,
during program execution
Legend:
7.5 MHz
NOTE: Minimum processor frequency is defined by system clock. Flash program or erase operations require a minimum VCC of 2.2 V.
Figure 1. Operating Area



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