MSP430F4783IPZ datasheet(27/79 Pages) TI

27 / 79 page

MSP430F47x3, MSP430F47x4

MIXED SIGNAL MICROCONTROLLER

SLAS545C − MAY 2007 − REVISED MARCH 2011

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted) (continued)

Schmitt-trigger inputs − Ports P1 through P5, P7 through P10, RST/NMI, JTAG: TCK, TMS, TDI/TCLK, TDO/TDI

PARAMETER

TEST CONDITIONS

VCC

MIN

TYP

MAX

UNIT

iti

t th

h ld

0.45

0.75

VCC

VIT+

Positive-going input threshold

voltage

2.2 V

1.00

1.65

VIT+

voltage

3 V

1.35

2.25

Nti

it th

h ld

0.25

0.55

VCC

VIT−

Negative-going input threshold

voltage

2.2 V

0.55

1.20

VIT−

voltage

3 V

0.75

1.65

Input voltage hysteresis (VIT+ −

2.2 V

0.2

1.0

Vhys

Input voltage hysteresis (VIT+

VIT−)

3 V

0.3

1.0

RPull

Pull−up/pull−down resistor

(not RST/NMI and JTAG pins)

For pull−up: VIN = VSS,

For pull−down: VIN = VCC

Input Capacitance

VIN = VSS or VCC

inputs − Ports P1, P2

PARAMETER

TEST CONDITIONS

VCC

MIN

MAX

UNIT

t(int)

External interrupt timing

Port P1, P2: P1.x to P2.x, External

trigger puls width to set interrupt flag,

(see Note 1)

2.2 V/3 V

NOTES:

1. An external signal sets the interrupt flag every time the minimum interrupt puls width t(int) is met. It may be set even with trigger signals

shorter than t(int).

leakage current − Ports P1 through P5, P7 through P10

PARAMETER

TEST CONDITIONS

VCC

MIN

MAX

UNIT

Ilkg(Px.x)

High-impedance leakage current

see Notes 1 and 2

2.2 V/3 V

±50

NOTES:

1. The leakage current is measured with VSS or VCC applied to the corresponding pin(s), unless otherwise noted.

2. The leakage of the digital port pins is measured individually. The port pin is selected for input and the pullup/pulldown resistor is

disabled.

MSP430F4783IPZ Datasheet(PDF) 27 Page - Texas Instruments

MSP430F4783IPZ Datasheet(HTML) 27 Page - Texas Instruments

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