LPC1850 datasheet(97/157 Pages) PHILIPS

97 / 157 page

LPC1850_30_20_10

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Preliminary data sheet

Rev. 3 — 6 December 2011

97 of 157

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

[1]

Typical ratings are not guaranteed. The values listed are at room temperature (25

C), nominal supply voltages.

[2]

VDD(REG)(3V3) = VDD(IO)=VDDA(3V3) = 3.3 V; Tamb =25 C for all power consumption measurements.

[3]

PLL1 disabled. Normal power mode.

[4]

PLL1 enabled. Normal power mode.

[5]

On pin VBAT; Tamb =25 C. VDD(REG)(3V3) not present.

[6]

Vps corresponds to the output of the power switch (see Figure 11) which is determined by the greater of VBAT and VDD(Reg)(3V3).

[7]

VDDA(3V3) = 3.3 V; Tamb =25 C.

[8]

VDD(IO) supply voltage must be present.

[9]

Allowed as long as the current limit does not exceed the maximum current allowed by the device.

[10] To VSS.

[11] The values specified are simulated and absolute values.

[12] The weak pull-up resistor is connected to the VDD(IO) rail and pulls up the I/O pin to the VDD(IO) level.

[13] The input cell disables the weak pull-up resistor when the applied input voltage exceeds VDD(IO).

[14] The parameter value specified is a simulated value excluding bond capacitance.

[15] For USB operation 3.0 V

 V

DD((IO)  3.6 V. Guaranteed by design.

[16] Includes external resistors of 33

 1 % on D+ and D.

10.1 Power consumption

Remark: All power consumption data in this section apply to Rev ‘A’ of the

LPC1850/30/20/10 parts only.

Vi(dif)

differential input voltage

100

400

1100

USB1 pins (USB1_DP/USB1_DM)[15]

IOZ

OFF-state output

current

0V<VI <3.3 V

[15] --

10

A

VBUS

bus supply voltage

5.25

VDI

differential input

sensitivity voltage

(D+)  (D)

0.2

VCM

differential common

mode voltage range

includes VDI range

0.8

2.5

Vth(rs)se

single-ended receiver

switching threshold

voltage

0.8

2.0

VOL

LOW-level output

voltage for

low-/full-speed

RL of 1.5 k to 3.6 V

0.18

VOH

HIGH-level output

voltage (driven) for

low-/full-speed

RL of 15 k to GND

2.8

3.5

Ctrans

transceiver capacitance pin to GND

ZDRV

driver output

impedance for driver

which is not high-speed

capable

with 33

 series resistor;

steady state drive

[16] 36

44.1



Table 8.

Static characteristics …continued

Tamb = 40 C to +85 C, unless otherwise specified. Applies to parts LPC1850/30/20/10 Rev ‘A’ only.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

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