LPC1850 datasheet(11/157 Pages) PHILIPS

11 / 157 page

LPC1850_30_20_10

All information provided in this document is subject to legal disclaimers.

Preliminary data sheet

Rev. 3 — 6 December 2011

11 of 157

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

P1_7

[3]

I; PU I/O

GPIO1[0] — General purpose digital input/output pin.

U1_DSR — Data Set Ready input for UART1.

CTOUT_13 — SCT output 13. Match output 1 of

timer 3.

I/O

EMC_D0 — External memory data line 0.

USB0_PPWR — VBUS drive signal (towards

external charge pump or power management unit);

indicates that VBUS must be driven (active HIGH).

Add a pull-down resistor to disable the power switch

at reset. This signal has opposite polarity compared

to the USB_PPWR used on other NXP LPC parts.

R — Function reserved.

P1_8

[3]

I; PU I/O

GPIO1[1] — General purpose digital input/output pin.

U1_DTR — Data Terminal Ready output for UART1.

CTOUT_12 — SCT output 12. Match output 0 of

timer 3.

I/O

EMC_D1 — External memory data line 1.

R — Function reserved.

SD_VOLT0 — SD/MMC bus voltage select output 0.

P1_9

[3]

I; PU I/O

GPIO1[2] — General purpose digital input/output pin.

U1_RTS — Request to Send output for UART1.

CTOUT_11 — SCT output 11. Match output 3 of

timer 2.

I/O

EMC_D2 — External memory data line 2.

R — Function reserved.

I/O

SD_DAT0 — SD/MMC data bus line 0.

Table 3.

Pin description …continued

LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.

Symbol

Description

LPC1850 Datasheet(PDF) 11 Page - NXP Semiconductors

LPC1850 Datasheet(HTML) 11 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL