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LPC1850 Datasheet(PDF) 18 Page - NXP Semiconductors |
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LPC1850 Datasheet(HTML) 18 Page - NXP Semiconductors |
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18 / 157 page ![]() LPC1850_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Preliminary data sheet Rev. 3 — 6 December 2011 18 of 157 NXP Semiconductors LPC1850/30/20/10 32-bit ARM Cortex-M3 microcontroller P2_9 H16 x B10 144 102 70 [3] I; PU I/O GPIO1[10] — General purpose digital input/output pin. Boot pin (see Table 5). O CTOUT_3 — SCT output 3. Match output 3 of timer 0. I/O U3_BAUD — Baud pin for USART3. I/O EMC_A0 — External memory address line 0. - R — Function reserved. - R — Function reserved. - R — Function reserved. - R — Function reserved. P2_10 G16 x E8 146 104 71 [3] I; PU I/O GPIO0[14] — General purpose digital input/output pin. O CTOUT_2 — SCT output 2. Match output 2 of timer 0. O U2_TXD — Transmitter output for USART2. I/O EMC_A1 — External memory address line 1. - R — Function reserved. - R — Function reserved. - R — Function reserved. - R — Function reserved. P2_11 F16 x A9 148 105 72 [3] I; PU I/O GPIO1[11] — General purpose digital input/output pin. O CTOUT_5 — SCT output 5. Match output 1 of timer 1. I U2_RXD — Receiver input for USART2. I/O EMC_A2 — External memory address line 2. - R — Function reserved. - R — Function reserved. - R — Function reserved. - R — Function reserved. Table 3. Pin description …continued LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2. Symbol Description |
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