ADS6123IRHB25 datasheet(33/67 Pages) TI1

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T − Temperature −

°C

−40

−20

G049

fIN = 10.1 MHz

SFDR

SNR

Input Amplitude − dBFS

G050

fIN = 20 MHz

SFDR (dBc)

SFDR (dBFS)

SNR (dBFS)

100

110

−60

−50

−40

−30

−20

−10

68.0

68.5

69.0

69.5

70.0

70.5

71.0

71.5

72.0

Input Clock Duty Cycle − %

G052

SNR

SFDR

fIN = 10.1 MHz

0.5

1.0

1.5

2.0

2.5

3.0

Input Clock Amplitude − VPP

G051

68.0

68.5

69.0

69.5

70.0

70.5

71.0

71.5

72.0

fIN = 20.1 MHz

SNR

SFDR

VVCM − VCM Voltage − V

1.30

1.35

1.40

1.45

1.50

1.55

1.60

1.65

1.70

fIN = 20.1 MHz

External Reference Mode

G054

SNR

SFDR

ADS6125, ADS6124

ADS6123, ADS6122

SLAS560A – OCTOBER 2007 – REVISED MARCH 2008

TYPICAL CHARACTERISTICS - ADS6123 (FS= 80 MSPS) (continued)

All plots are at 25

°C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 V

PP differential

clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output

interface (unless otherwise noted)

PERFORMANCE vs TEMPERATURE

PERFORMANCE vs INPUT AMPLITUDE

Figure 56.

Figure 57.

PERFORMANCE vs CLOCK AMPLITUDE

PERFORMANCE vs INPUT CLOCK DUTY CYCLE

Figure 58.

Figure 59.

PERFORMANCE IN EXTERNAL REFERENCE MODE

Figure 60.

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Product Folder Link(s): ADS6125, ADS6124 ADS6123, ADS6122

ADS6123IRHB25 Datasheet(PDF) 33 Page - Texas Instruments

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