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MPC5645S Datasheet(PDF) 26 Page - Freescale Semiconductor, Inc |
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MPC5645S Datasheet(HTML) 26 Page - Freescale Semiconductor, Inc |
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26 / 146 page  2.3 416 TEPBGA package pinout Figure 4 shows the pinout for the 416 TEPBGA package. Figure 4. 416 TEPBGA pinout 123456789 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 A ddr_dq[2 6] ddr_dq[2 7] ddr_dq[2 8] ddr_dq[2 9] 30] 31] ddr_ba[0]ddr_ba[1]ddr_ba[2] ddr_addr ess[0] ddr_addr ess[4] ddr_addr ess[6] ddr_addr ess[8] ddr_addr ess[12] PG12 PF14 PF10 PF8 PF5 PF3 PK0 PB3 PJ12 PL11 PG7 PG6 A B ddr_dq[2 5] VSS ddr_dqs[ 3] ddr_dm[3 ] VSS ddr_cas ddr_ras VSS ddr_web ddr_addr ess[1] VSS ddr_addr ess[7] ddr_addr ess[9] VSS ddr_addr ess[15] PF13 VDDE PF15 VSS PF1 VDDE PJ15 PL13 VDDE VSS PG5 B C ddr_dq[2 3]] VDDE_DD R VSS ddr_dq[2 4] VDDE_DD R VSS ddr_dram _clk VDDE_DD DR VSS ddr_addr ess[2] VDDE_DD R VSS ddr_addr ess[10] VDDE_DD R VSS PF12 VSS PF7 VDDE PF0 VSS PJ14 PL12 PL10 PG3 PG4 C D ddr_dq[1 9] ddr_dq[2 0] ddr_dq[2 1] ddr_dq[2 2] ddr_odt VDD33_D DR ddr_dram _clkb ddr_cke ddr_cs ddr_addr ess[3] ddr_addr ess[5] VDD33_D DR ddr_addr ess[11] ddr_addr ess[13] ddr_addr ess[14] PF11 PF9 PF6 PF4 PK1 PB2 PJ13 PM2 VREF_RS DS2 PG2 PG1 D E ddr_dq[1 7] VSS VDDE_DD R ddr_dq[1 8] PG11 VSS VDDE PG0 E F ddr_dq[1 6] MVTT3 VSS VDD33_D DR PA15 PA14 PA13 PA12 F G ddr_dq[1 5] ddr_dqs[ 2] ddr_dm[2 ] ddr_dq[1 4] PA11 PA9 PA8 PA7 G H ddr_dq[1 3] VSS VDDE_DD R ddr_dq[1 2] PA10 VDDE VSS VA6 H J ddr_dq[1 1] MVTT2 VSS MVREF PA3 VREF_RS DS1 PA5 PA4 J K ddr_dq[9] ddr_dqs[ 1] ddr_dm[1 ] ddr_dq[1 0] VDD12 VSS VDD12 VSS VDD12 VSS VDD12 VSS PA2 VSS PA1 PA0 K L ddr_dq[8] VSS VDDE_DD R ddr_dq[7] VSS VDD12 VSS VDD12 VSS VDD12 VSS VDD12 PM13 PM12 VDDE PJ0 L M ddr_dq[5] MVTT1 VSS ddr_dq[6] VDD12 VSS VSS VSS VSS VSS VDD12 VSS PO7 PO6 PO5 PO4 M N ddr_dq[3] ddr_dqs[ 0] VDDE_DD R ddr_dq[4] VSS VDD12 VSS VSS VSS VSS VSS VDD12 PO3 VDDE PO2 PO1 N P ddr_dq[1] VSS ddr_dm[0 ] ddr_dq[2] VDD12 VSS VSS VSS VSS VSS VDD12 VSS PO0 PN15 VSS PN14 P R ddr_dq[0] MVTT0 VSS VDD33_D DR VSS VDD12 VSS VSS VSS VSS VSS VDD12 PE7 PE6 PN13 PN12 R T PG10 PG9 VDDE_DD R PG8 VDD12 VSS VDD12 VSS VDD12 VSS VDD12 VSS PE5 PE4 PE3 PE2 T U PJ9 PJ8 PJ2 PJ1 VSS VDD12 VSS VDD12 VSS VDD12 VSS VDD12 PE1 VSSM VDDM PE0 U V PB1 VSS PJ11 PJ10 PD15 PD14 PD13 PD12 V W RESET PB10 VDDE PB0 PD11 VDDM VSSM PD10 W Y VSS PM4 PM3 PB11 PD9 PD8 PD7 PD6 Y AA XTAL VREG_BY PASS VRC_CTR L VDDREG PD5 VSSM VDDM PD4 AA AB EXTAL PL4 VSS VDDPLL PD3 PD2 PD1 PD0 AB AC VSUP_TE ST PL5 PN0 PK4 PK6 PH0 PF2 PB13 PK11 PN2 PN4 PN8 PB9 PB7 PJ7 PB5 MCKO MDO6 MDO10 MVO0 PC0 VDDA VSSEH_A DC PC3 PC1 PC2 AC AD PL6 VDDE PN1 VSS PK7 PH1 VDDE EVTI MSEO VSS PN5 PN9 VDDE PJ4 PJ3 VSS MSEO2 MDO7 VDDE MDO1 PC6 VSSA VDDEH_A DC PC4 PC7 PC5 AD AE PL7 VSS PK2 VDDE PK8 PH2 VSS EVTO PM0 VDDE PN6 PN10 VSS PJ5 PH4 VDDE MDO4 MDO8 VSS MDO2 PL1 PL0 PC10 PC11 PC9 PC8 AE AF PL8 PL9 PK3 PK5 PK9 PH3 PB12 PK10 PM1 PN3 PN7 PN11 PB8 PJ6 PB4 PB6 MDO5 MDO9 MDO11 MDO3 PL3 PL2 PC15 PC14 PC13 PC12 AF 123 456789 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 |
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