MPC5645S datasheet(20/146 Pages) FREESCALE

20 / 146 page

Qorivva MPC5645S Microcontroller Data Sheet, Rev. 8

Freescale Semiconductor

The source system clock frequency can be changed via an on-chip programmable clock divider (

1 to 2). An additional

programmable peripheral bus clock divider (ratios

1 to ) is also available.

The MPC5645S has two on-chip FMPLLs (primary and secondary). Each features the following:

•

Input clock frequency from 4 MHz to 16 MHz

•

Lock detect circuitry continuously monitors lock status

•

Loss Of Clock (LOC) detection for reference and feedback clocks

•

On-chip loop filter (for improved electromagnetic interference performance and reduction of number of external

components required)

•

Support for frequency ramping from PLL

The primary FMPLL module is for use as a system clock source. The secondary FMPLL is available for use as an alternate,

modulated or non-modulated clock source to eMIOS modules and as alternate clock to the DCU for pixel clock generation.

The fast external oscillator provides the following features:

•

Input frequency range 4–16 MHz

•

Square-wave input mode

•

Oscillator input mode 3.3 V (5.0 V)

•

Automatic level control

•

Low power consumption

•

PLL reference

The MPC5645S also includes the following oscillators:

•

32 KHz low power external oscillator for slow execution, low power, and RTC

•

Dedicated internal 128 kHz RC oscillator for low power mode operation and self wake-up

— ±10% accuracy across voltage and temperature (after factory trimming)

— Trimming registers to support improved accuracy with in-application calibration

•

Dedicated 16 MHz internal RC oscillator

— Used as default clock source out of reset

— Provides a clock for rapid start-up from low power modes

— Provides a back-up clock in the event of PLL or External Oscillator clock failure

— Offers an independent clock source for the SWT

— ±5% accuracy across voltage and temperature (after factory trimming)

— Trimming registers to support frequency adjustment with in-application calibration

1.4.27

Periodic Interrupt Timer (PIT)

The PIT features the following:

•

Eight general purpose interrupt timers

•

Two dedicated interrupt timers for triggering ADC conversions

•

32-bit counter resolution

•

Clocked by system clock frequency

1.4.28

Real Time Counter (RTC)

The Real Timer Counter supports wake-up from Low Power modes or Real Time Clock generation

•

Configurable resolution for different timeout periods

— 1 s resolution for >1 hour period

— 1 ms resolution for 2 second period

MPC5645S Datasheet(PDF) 20 Page - Freescale Semiconductor, Inc

MPC5645S Datasheet(HTML) 20 Page - Freescale Semiconductor, Inc

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