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MFRC63002R Datasheet(PDF) 13 Page - NXP Semiconductors |
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MFRC63002R Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 118 page ![]() MFRC630 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.1 — 6 September 2012 227531 13 of 118 NXP Semiconductors MFRC630 Contactless reader IC 8.4.2 SPI interface 8.4.2.1 General The MFRC630 acts as a slave during the SPI communication. The SPI clock SCK has to be generated by the master. Data communication from the master to the slave uses the Line MOSI. Line MISO is used to send data back from the MFRC630 to the master. A serial peripheral interface (SPI compatible) is supported to enable high speed communication to a host. The implemented SPI compatible interface is according to a standard SPI interface. The SPI compatible interface can handle data speed of up to 10 Mbit/s. In the communication with a host MFRC630 acts as a slave receiving data from the external host for register settings and to send and receive data relevant for the communication on the RF interface. On both data lines (MOSI, MISO) each data byte is sent by MSB first. Data on MOSI line shall be stable on rising edge of the clock line (SCK) and is allowed to change on falling edge. The same is valid for the MISO line. Data is provided by the MFRC630 on the falling edge and is stable on the rising edge.The polarity of the clock is low at SPI idle. 8.4.2.2 Read data To read out data from the MFRC630 by using the SPI compatible interface the following byte order has to be used. The first byte that is sent defines the mode (LSB bit) and the address. Table 6. Connection scheme for detecting the different interface types Pin Pin Symbol UART SPI I2C I2C-L 28 IF0 RX MOSI ADR1 ADR1 29 IF1 - SCK SCL SCL 30 IF2 TX MISO ADR2 SDA 31 IF3 1 NSS SDA ADR2 26 IFSEL0 0 0 1 1 27 IFSEL1 0 1 0 1 Fig 7. Connection to host with SPI 001aal998 READER IC IF1 SCK IF0 MOSI IF2 MISO IF3 NSS Table 7. Byte Order for MOSI and MISO byte 0 byte 1 byte 2 byte 3 to n-1 byte n byte n+1 MOSI address 0 address 1 address 2 …….. address n 00h MISO X data 0 data 1 …….. data n 1data n |
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