TLK3114SCZPV datasheet(63/68 Pages) TI1

63 / 68 page

4−7

VDDQ

Ω

Output

PCB

Input

Transmission Line

GND

Ω

VREF

Ω

VREF

Ω

(optional)

NOTE: The output buffer of the TLK3114SC has on-chip termination of 50

Ω. The

output signal is compliant with the JEDEC SSTL_2 Class 1 specification.

Line termination on the receive end is optional and not recommended for

low-power applications.

Figure 4−10. SSTL_2 Class 1 I/O

VDDQ

Ω

Output

PCB

Input

Transmission Line

GND

Ω

VREF

Ω

NOTE: The TLK3114SC provides a push-pull effect on the output buffer for

externally sourced series terminated loads. In HSTL mode, the signal swing

is small, allowing for minimal power consumption and low electromagnetic

emission (EME). To assure sufficient signal levels on the receive side, no

termination resistor is used.

Figure 4−11. HSTL I/O

4.12 Package Dissipation Rating

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

Airflow = 0 M/S

21.6

°C/W

θJA

Junction to free air thermal resistance

Airflow = 1 M/S

17.8

°C/W

Junction to free air thermal resistance

Airflow = 2 M/S

16.7

°C/W

TLK3114SCZPV Datasheet(PDF) 63 Page - Texas Instruments

TLK3114SCZPV Datasheet(HTML) 63 Page - Texas Instruments

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