S29AS016J datasheet(38/60 Pages) SPANSION

38 / 60 page

S29AS016J

S29AS016J_00_11 February 1, 2012

Da ta

Sh e e t

12. Write Operation Status

The device provides several bits to determine the status of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7,

and RY/BY#. Table 12.1 on page 42 and the following subsections describe the functions of these bits. DQ7,

RY/BY#, and DQ6 each offer a method for determining whether a program or erase operation is complete or

in progress. These three bits are discussed first.

12.1

DQ7: Data# Polling

The Data# Polling bit, DQ7, indicates to the host system whether an Embedded Algorithm is in progress or

completed, or whether the device is in Erase Suspend. Data# Polling is valid after the rising edge of the final

WE# pulse in the program or erase command sequence.

During the Embedded Program algorithm, the device outputs on DQ7 the complement of the datum

programmed to DQ7. This DQ7 status also applies to programming during Erase Suspend. When the

Embedded Program algorithm is complete, the device outputs the datum programmed to DQ7. The system

must provide the program address to read valid status information on DQ7. If a program address falls within a

protected sector, Data# Polling on DQ7 is active for approximately 1 µs, then the device returns to reading

array data.

During the Embedded Erase algorithm, Data# Polling produces a 0 on DQ7. When the Embedded Erase

algorithm is complete, or if the device enters the Erase Suspend mode, Data# Polling produces a 1 on DQ7.

This is analogous to the complement/true datum output described for the Embedded Program algorithm: the

erase function changes all the bits in a sector to 1; prior to this, the device outputs the complement, or 0. The

system must provide an address within any of the sectors selected for erasure to read valid status information

on DQ7.

After an erase command sequence is written, if all sectors selected for erasing are protected, Data# Polling

on DQ7 is active for approximately 100 µs, then the device returns to reading array data. If not all selected

sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the

selected sectors that are protected.

When the system detects DQ7 has changed from the complement to true data, it can read valid data (at

DQ7–DQ0 in byte mode or DQ15–DQ0 in word mode) on the following read cycles. This is because DQ7 may

change asynchronously with DQ0–DQ6 while Output Enable (OE#) is asserted low. Figure 18.7 on page 50,

illustrates this.

Table 12.1 on page 42 shows the outputs for Data# Polling on DQ7. Figure 12.2 on page 41 shows the Data#

Polling algorithm.

S29AS016J Datasheet(PDF) 38 Page - SPANSION