CY8C54LP datasheet(23/117 Pages) CYPRESS

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PRELIMINARY

PSoC® 5LP: CY8C54LP Family

Datasheet

Document Number: 001-84934 Rev. **

Page 23 of 117

The central timewheel is a 1-kHz, free-running, 13-bit counter

clocked by the ILO. The central timewheel is always enabled

except in hibernate mode and when the CPU is stopped during

debug on chip mode. It can be used to generate periodic

interrupts for timing purposes or to wake the system from a low

power mode. Firmware can reset the central timewheel.

The central timewheel can be programmed to wake the system

periodically and optionally issue an interrupt. This enables

flexible, periodic wakeups from low power modes or coarse

timing applications. Systems that require accurate timing should

use the RTC capability instead of the central timewheel.

The 100-kHz clock (CLK100K) can be used as a low power

system clock to run the CPU. It can also generate time intervals

using the fast timewheel.

The fast timewheel is a 5-bit counter, clocked by the 100-kHz

clock. It features programmable settings and automatically

resets when the terminal count is reached. An optional interrupt

can be generated each time the terminal count is reached. This

enables flexible, periodic interrupts of the CPU at a higher rate

than is allowed using the central timewheel.

The 33-kHz clock (CLK33K) comes from a divide-by-3 operation

on CLK100K. This output can be used as a reduced accuracy

version of the 32.768-kHz ECO clock with no need for a crystal.

6.1.2 External Oscillators

6.1.2.1

MHz External Crystal Oscillator

The MHzECO provides high frequency, high precision clocking

using an external crystal (see Figure 6-2). It supports a wide

variety of crystal types, in the range of 4 to 25 MHz. When used

in conjunction with the PLL, it can generate CPU and system

clocks up to the device's maximum frequency (see

Phase-Locked Loop on page 22). The GPIO pins connecting to

the external crystal and capacitors are fixed. MHzECO accuracy

depends on the crystal chosen.

Figure 6-2. MHzECO Block Diagram

6.1.2.2

32.768 kHz ECO

The 32.768-kHz external crystal oscillator (32kHzECO) provides

precision timing with minimal power consumption using an

external 32.768-kHz watch crystal (see Figure 6-3). The

32kHzECO also connects directly to the sleep timer and provides

the source for the RTC. The RTC uses a 1-second interrupt to

implement the RTC functionality in firmware.

The oscillator works in two distinct power modes. This allows

users to trade off power consumption with noise immunity from

neighboring circuits. The GPIO pins connected to the external

crystal and capacitors are fixed.

Figure 6-3. 32kHzECO Block Diagram

It is recommended that the external 32.768-kHz watch crystal

have a load capacitance (CL) of 6 pF or 12.5 pF. Check the

crystal manufacturer's datasheet. The two external capacitors,

CL1 and CL2, are typically of the same value, and their total

capacitance, CL1CL2 / (CL1 + CL2), including pin and trace

capacitance, should equal the crystal CL value. For more infor-

mation, refer to application note AN54439: PSoC 3 and PSoC 5

External Oscillators. See also pin capacitance specifications in

the “GPIO” section on page 69.

6.1.2.3

Digital System Interconnect

The DSI provides routing for clocks taken from external clock

oscillators connected to I/O. The oscillators can also be

generated within the device in the digital system and Universal

Digital Blocks.

While the primary DSI clock input provides access to all clocking

resources, up to eight other DSI clocks (internally or externally

generated) may be routed directly to the eight digital clock

dividers. This is only possible if there are multiple precision clock

sources.

(Pin P15[0])

4 - 25 MHz

Crystal Osc

XCLK_MHZ

4 – 25 MHz

crystal

Capacitors

External

Components

(Pin P15[1])

(Pin P15[2])

32 kHz

Crystal Osc

XCLK32K

32 kHz

crystal

Capacitors

External

Components

(Pin P15[3])

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