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CY8C54LP Datasheet(PDF) 30 Page - Cypress Semiconductor

Part # CY8C54LP
Description  Programmable System-on-Chip (PSoC짰)
PDF  117 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY8C54LP Datasheet(HTML) 30 Page - Cypress Semiconductor

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PRELIMINARY
PSoC® 5LP: CY8C54LP Family
Datasheet
Document Number: 001-84934 Rev. **
Page 30 of 117
6.4 I/O System and Routing
PSoC I/Os are extremely flexible. Every GPIO has analog and
digital I/O capability. All I/Os have a large number of drive modes,
which are set at POR. PSoC also provides up to four individual
I/O voltage domains through the VDDIO pins.
There are two types of I/O pins on every device; those with USB
provide a third type. Both General Purpose I/O (GPIO) and
Special I/O (SIO) provide similar digital functionality. The primary
differences are their analog capability and drive strength.
Devices that include USB also provide two USBIO pins that
support specific USB functionality as well as limited GPIO
capability.
All I/O pins are available for use as digital inputs and outputs for
both the CPU and digital peripherals. In addition, all I/O pins can
generate an interrupt. The flexible and advanced capabilities of
the PSoC I/O, combined with any signal to any pin routability,
greatly simplify circuit design and board layout. All GPIO pins can
be used for analog input, CapSense[7], and LCD segment drive,
while SIO pins are used for voltages in excess of VDDA and for
programmable output voltages.
Features supported by both GPIO and SIO:
User programmable port reset state
Separate I/O supplies and voltages for up to four groups of I/O
Digital peripherals use DSI to connect the pins
Input or output or both for CPU and DMA
Eight drive modes
Every pin can be an interrupt source configured as rising
edge, falling edge or both edges. If required, level sensitive
interrupts are supported through the DSI
Dedicated port interrupt vector for each port
Slew rate controlled digital output drive mode
Access port control and configuration registers on either port
basis or pin basis
Separate port read (PS) and write (DR) data registers to avoid
read modify write errors
Special functionality on a pin by pin basis
Additional features only provided on the GPIO pins:
LCD segment drive on LCD equipped devices
CapSense[7]
Analog input and output capability
Continuous 100 µA clamp current capability
Standard drive strength down to 1.71 V
Additional features only provided on SIO pins:
Higher drive strength than GPIO
Hot swap capability (5 V tolerance at any operating VDD)
Programmable and regulated high input and output drive
levels down to 1.2 V
No analog input, CapSense, or LCD capability
Over voltage tolerance up to 5.5 V
SIO can act as a general purpose analog comparator
USBIO features:
Full speed USB 2.0 compliant I/O
Highest drive strength for general purpose use
Input, output, or both for CPU and DMA
Input, output, or both for digital peripherals
Digital output (CMOS) drive mode
Each pin can be an interrupt source configured as rising
edge, falling edge, or both edges



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