Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

AD9508PCBZ Datasheet(PDF) 37 Page - Analog Devices

Part # AD9508PCBZ
Description  1.65 GHz Clock Fanout Buffer with Output Dividers and Delay Adjust
PDF  40 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9508PCBZ Datasheet(HTML) 37 Page - Analog Devices

Back Button AD9508PCBZ Datasheet HTML 32Page - Analog Devices AD9508PCBZ Datasheet HTML 33Page - Analog Devices AD9508PCBZ Datasheet HTML 34Page - Analog Devices AD9508PCBZ Datasheet HTML 35Page - Analog Devices AD9508PCBZ Datasheet HTML 36Page - Analog Devices AD9508PCBZ Datasheet HTML 37Page - Analog Devices AD9508PCBZ Datasheet HTML 38Page - Analog Devices AD9508PCBZ Datasheet HTML 39Page - Analog Devices AD9508PCBZ Datasheet HTML 40Page - Analog Devices  
Zoom Inzoom in Zoom Outzoom out
 37 / 40 page
background image
Data Sheet
AD9508
Rev. A | Page 37 of 40
OUT3 FUNCTIONS (REGISTER 0x27 TO REGISTER 0x2C)
Table 33. Divide Ratio and Phase
Address
Bits
Bit Name
Description
0x27
[7:0]
OUT3 Divide Ratio[7:0]
Channel 3 divide ratio, Bits[7:0]
0x28
[7:2]
Reserved
0x00 = default
[1:0]
OUT3 Divide Ratio[9:8]
Channel 3 divide ratio, Bits[9:8]
0x29
[7:0]
OUT3 Phase[7:0]
Channel 3 divider phase, Bits[7:0]
0x2A
[7:3]
Reserved
0x00 = default
[2:0]
OUT3 Phase[10:8]
Channel 3 divider phase, Bits[9:8]
Table 34. Output Driver, Power Down, and Sync
Address
Bits
Bit Name
Description
0x2B
7
PD_3
Channel 3 power-down
6
SYNCMASK3
Setting this bit masks OUT3 from the output sync function
0 = Channel 3 is synchronized during output sync (default)
1 = Channel 3 is excluded from an output sync
[5:4]
OUT3 Driver Phase[1:0]
These bits determine the phase of the OUT3 driver
00 = force high
01 = noninverting
10 = inverting
11 = force low
[3:1]
OUT3 Mode[2:0]
These bits determine the OUT3 driver mode
000 = LVDS 0.5 × 3.5 mA (1/2 amplitude)
001 = LVDS 0.75 × 3.5 mA (3/4 amplitude)
010 = LVDS 1 × 3.5 mA (default)
011 = LVDS 1.25 × 3.5 mA (1.25 amplitude)
100 = HSTL 1 × 3.5 mA (normal amplitude)
101 = HSTL 2 × 3.5 mA (double amplitude)
110 = high-Z/CMOS
111 = high-Z/CMOS
0
Reserved
0b = default
0x2C
7
EN_CMOS_3P
Setting this bit enables the OUT3P CMOS driver
0 = disables the OUT3P CMOS driver (default)
1 = enables OUT3P CMOS driver
[6:5]
CMOS_3P_PHASE[1:0]
These bits determine the phase of the OUT3P CMOS driver
00 = force high (default)
01 = noninverting
10 = inverting
11 = force low
4
EN_CMOS_3N
Setting this bit enables the OUT3N CMOS driver
0 = disables the OUT3N CMOS driver (default)
1 = enables OUT3N CMOS driver
[3:2]
CMOS_3N_PHASE[1:0]
These bits determine the phase of the OUT3N CMOS driver
00 = force high (default)
01 = noninverting
10 = inverting
11 = force low
[1:0]
Reserved
00b = default



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com