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AD9508PCBZ Datasheet(PDF) 37 Page - Analog Devices |
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AD9508PCBZ Datasheet(HTML) 37 Page - Analog Devices |
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37 / 40 page ![]() Data Sheet AD9508 Rev. A | Page 37 of 40 OUT3 FUNCTIONS (REGISTER 0x27 TO REGISTER 0x2C) Table 33. Divide Ratio and Phase Address Bits Bit Name Description 0x27 [7:0] OUT3 Divide Ratio[7:0] Channel 3 divide ratio, Bits[7:0] 0x28 [7:2] Reserved 0x00 = default [1:0] OUT3 Divide Ratio[9:8] Channel 3 divide ratio, Bits[9:8] 0x29 [7:0] OUT3 Phase[7:0] Channel 3 divider phase, Bits[7:0] 0x2A [7:3] Reserved 0x00 = default [2:0] OUT3 Phase[10:8] Channel 3 divider phase, Bits[9:8] Table 34. Output Driver, Power Down, and Sync Address Bits Bit Name Description 0x2B 7 PD_3 Channel 3 power-down 6 SYNCMASK3 Setting this bit masks OUT3 from the output sync function 0 = Channel 3 is synchronized during output sync (default) 1 = Channel 3 is excluded from an output sync [5:4] OUT3 Driver Phase[1:0] These bits determine the phase of the OUT3 driver 00 = force high 01 = noninverting 10 = inverting 11 = force low [3:1] OUT3 Mode[2:0] These bits determine the OUT3 driver mode 000 = LVDS 0.5 × 3.5 mA (1/2 amplitude) 001 = LVDS 0.75 × 3.5 mA (3/4 amplitude) 010 = LVDS 1 × 3.5 mA (default) 011 = LVDS 1.25 × 3.5 mA (1.25 amplitude) 100 = HSTL 1 × 3.5 mA (normal amplitude) 101 = HSTL 2 × 3.5 mA (double amplitude) 110 = high-Z/CMOS 111 = high-Z/CMOS 0 Reserved 0b = default 0x2C 7 EN_CMOS_3P Setting this bit enables the OUT3P CMOS driver 0 = disables the OUT3P CMOS driver (default) 1 = enables OUT3P CMOS driver [6:5] CMOS_3P_PHASE[1:0] These bits determine the phase of the OUT3P CMOS driver 00 = force high (default) 01 = noninverting 10 = inverting 11 = force low 4 EN_CMOS_3N Setting this bit enables the OUT3N CMOS driver 0 = disables the OUT3N CMOS driver (default) 1 = enables OUT3N CMOS driver [3:2] CMOS_3N_PHASE[1:0] These bits determine the phase of the OUT3N CMOS driver 00 = force high (default) 01 = noninverting 10 = inverting 11 = force low [1:0] Reserved 00b = default |
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