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WM8903 Datasheet(PDF) 85 Page - Wolfson Microelectronics plc |
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WM8903 Datasheet(HTML) 85 Page - Wolfson Microelectronics plc |
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85 / 178 page  Production Data WM8903 w PD, Rev 4.5, June 2012 85 The direction of these signals and the clock frequencies are controlled as described in the “Digital Audio Interface Control” section. BCLK and LRC can be enabled as outputs in Slave mode, allowing mixed Master/Slave operation - see “Digital Audio Interface Control”. OPERATION WITH TDM Time division multiplexing (TDM) allows multiple devices to transfer data simultaneously on the same bus. The WM8903 ADCs and DACs support TDM in master and slave modes for all data formats and word lengths. TDM is enabled and configured using register bits defined in the “Digital Audio Interface Control” section. WM8903 Processor WM8903 or Similar CODEC ADCDAT LRC DACDAT BCLK ADCDAT LRC DACDAT BCLK WM8903 Processor WM8903 or Similar CODEC ADCDAT LRC DACDAT BCLK ADCDAT LRC DACDAT BCLK Figure 38 TDM with WM8903 as Master Figure 39 TDM with Other CODEC as Master WM8903 Processor WM8903 or Similar CODEC ADCDAT LRC DACDAT BCLK ADCDAT LRC DACDAT BCLK Figure 40 TDM with Processor as Master Note: The WM8903 is a 24-bit device. If the user operates the WM8903 in 32-bit mode then the 8 LSBs will be ignored on the receiving side and not driven on the transmitting side. It is therefore recommended to add a pull-down resistor if necessary to the DACDAT line and the ADCDAT line in TDM mode. |
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