LNBH26PQR datasheet(8/38 Pages) STMICROELECTRONICS

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Application information (valid for each section A/B)

LNBH26

8/38

Doc ID 022771 Rev 1

protection status (OLF), to the output voltage level (VMON), to 22 kHz tone characteristics

(TMON), to the minimum load current (IMON), to external voltage source presence on the

VOUT pin (PDO), and to 22 kHz tone presence on the DETIN pin (TDET). Once the OLF (or

the OTF or PNG) bit has been activated (set to “1”), it is latched to “1” until the relevant

cause is removed and a new register reading operation is done.

2.9

Surge protections and TVS diodes

Each LNBH26 device section is directly connected to the antenna cable in a set-top box.

Atmospheric phenomenon can cause high voltage discharges on the antenna cable causing

damage to the attached devices. Surge pulses occur due to direct or indirect lightning

strikes to an external (outdoor) circuit. This leads to currents or electromagnetic fields

causing high voltage or current transients. Transient voltage suppressor (TVS) devices are

usually used, as shown in the following schematic (

Figure 4), to protect each section of STB

output circuits where the LNBH26 and other devices are electrically connected to the

antenna cable.

Figure 4.

Surge protection circuit

For this purpose we recommend the use of LNBTVSxx surge protection diodes specifically

maximum peak power dissipation that the diode is capable of supporting (see the LNBTVS

datasheet for further details).

2.10

FLT: Fault FLAG

In order to get an immediate feedback on a diagnostic status, the LNBH26 is equipped with

a dedicated fault flag pin (FLT). In the case an overload (OLF bit=1), overheating (OTF bit=1)

or power not good (PNG bit=1) condition is detected, the FLT pin (open drain output) is set

to low and is kept low until the relevant activating diagnostic bit is cleared. Be aware that

diagnostic bits OLF, OTF and PNG, once activated, are kept latched to “1” until the origin

cause is removed and a new register reading operation is performed by the microprocessor.

The FLT pin must be connected to a positive voltage (5 V max.) by means of a pull-up

resistor.

2.11

VMON: output voltage diagnostic

When one device output voltage is activated (VOUT pin), its value is internally monitored

and, as long as the output voltage level is below the guaranteed limits, the relevant VMON

I²C bit is set to “1” (see

Table 17 for more details).

LNBH26PQR Datasheet(PDF) 8 Page - STMicroelectronics