MACH211SP-7VC datasheet(7/37 Pages) AMD

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MACH211SP-7/10/12/15/20

FUNCTIONAL DESCRIPTION

The MACH211SP consists of four PAL blocks con-

nected by a switch matrix. There are 32 I/O pins feeding

the switch matrix. These signals are distributed to the

four PAL blocks for efﬁcient design implementation.

There are two clock pins that can also be used as ded-

icated inputs.

The PAL Blocks

Each PAL block in the MACH211SP (Figure 1) contains

a 64-product-term logic array, a logic allocator, 8 output

macrocells, 8 buried macrocells, and 8 I/O cells. The

switch matrix feeds each PAL block with 26 inputs. This

makes the PAL block look effectively like an indepen-

dent “PAL26V16” with 8 buried macrocells.

In addition to the logic product terms, two output enable

product terms, an asynchronous reset product term,

and an asynchronous preset product term are pro-

vided. One of the two output enable product terms can

be chosen within each I/O cell in the PAL block. All

ﬂip-ﬂops within the PAL block are initialized together.

The Switch Matrix

The MACH211SP switch matrix is fed by the inputs and

feedback signals from the PAL blocks. Each PAL block

provides 16 internal feedback signals and 8 I/O feed-

back signals. The switch matrix distributes these sig-

nals back to the PAL blocks in an efﬁcient manner that

also provides for high performance. The design soft-

ware automatically conﬁgures the switch matrix when

ﬁtting a design into the device.

The Product-term Array

The MACH211SP product-term array consists of 64

product terms for logic use, and 4 special-purpose

product terms. Two of the special-purpose product

terms provide programmable output enable; one pro-

vides asynchronous reset, and one provides asynchro-

nous preset.

The Logic Allocator

The logic allocator in the MACH211SP takes the 64

logic product terms and allocates them to the 16

macrocells as needed. Each macrocell can be driven

by up to 16 product terms. The design software auto-

matically conﬁgures the logic allocator when ﬁtting the

design into the device.

Table 1 illustrates which product term clusters are avail-

able to each macrocell within a PAL block. Refer to

Figure 1 for cluster and macrocell numbers.

The Macrocell

The MACH211SP has two types of macrocell: output

and buried. The output macrocells can be conﬁgured

as either registered, latched, or combinatorial, with pro-

grammable polarity. The macrocell provides internal

feedback whether conﬁgured with or without the

ﬂip-ﬂop. The registers can be conﬁgured as D-type or

T-type, allowing for product-term optimization.

The ﬂip-ﬂops can individually select one of two clock/

gate pins, which are also available as data inputs. The

registers are clocked on the LOW-to-HIGH transition of

the clock signal. The latch holds its data when the gate

input is HIGH, and is transparent when the gate input

is LOW. The ﬂip-ﬂops can also be asynchronously ini-

tialized with the common asynchronous reset and pre-

set product terms.

The buried macrocells are the same as the output

macrocells if they are used for generating logic. In that

case, the only thing that distinguishes them from the

output macrocells is the fact that there is no I/O cell

connection, and the signal is only used internally. The

buried macrocell can also be conﬁgured as an input

The I/O Cell

The I/O cell in the MACH211SP consists of a

three-state output buffer. The three-state buffer can be

conﬁgured in one of three ways: always enabled, al-

ways disabled, or controlled by a product term. If prod-

uct term control is chosen, one of two product terms

may be used to provide the control. The two product

terms that are available are common to all I/O cells in a

PAL block.

Table 1.

Logic Allocation

Macrocell

Available Clusters

Output

Buried

C0, C1, C2

C0, C1, C2, C3

C1, C2, C3, C4

C2, C3, C4, C5

C3, C4, C5, C6

C4, C5, C6, C7

C5, C6, C7, C8

C6, C7, C8, C9

C7, C8, C9, C10

C8, C9, C10, C11

M10

C9, C10, C11, C12

M11

C10, C11, C12, C13

M12

C11, C12, C13, C14

M13

C12, C13, C14, C15

M14

C13, C14, C15

M15

C14, C15

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