JS28F640P33TF70 datasheet(54/88 Pages) NUMONYX

54 / 88 page

P33-65nm

Datasheet

Jul 2011

Order Number: 208034-04

15.4

AC Write Specifications

Table 25: AC Write Specifications

Num

Symbol

Parameter

Min

Max

Unit

Notes

tPHWL

RST# high recovery to WE# low

150

1,2,3

tELWL

CE# setup to WE# low

1,2,3

tWLWH

WE# write pulse width low

1,2,4

tDVWH

Data setup to WE# high

1,2, 12

tAVWH

Address setup to WE# high

1,2

tWHEH

CE# hold from WE# high

tWHDX

Data hold from WE# high

tWHAX

Address hold from WE# high

tWHWL

WE# pulse width high

1,2,5

W10

tVPWH

VPP setup to WE# high

200

1,2,3,7

W11

tQVVL

VPP hold from Status read

W12

tQVBL

WP# hold from Status read

1,2,3,7

W13

tBHWH

WP# setup to WE# high

200

W14

tWHGL

WE# high to OE# low

1,2,9

W16

tWHQV

WE# high to read valid

tAVQV + 35

1,2,3,6,10

Write to Asynchronous Read Specifications

W18

tWHAV

WE# high to Address valid

1,2,3,6,8

Write to Synchronous Read Specifications

W19

tWHCH/L

WE# high to Clock valid

1,2,3,6,10

W20

tWHVH

WE# high to ADV# high

Write Specifications with Clock Active

W21

tVHWL

ADV# high to WE# low

1,2,3,11

W22

tCHWL

Clock high to WE# low

Notes:

Write timing characteristics during erase suspend are the same as write-only operations.

A write operation can be terminated with either CE# or WE#.

Sampled, not 100% tested.

Write pulse width low (tWLWH or tELEH) is defined from CE# or WE# low (whichever occurs last) to CE# or WE# high

(whichever occurs first). Hence, tWLWH = tELEH = tWLEH = tELWH.

Write pulse width high (tWHWL or tEHEL) is defined from CE# or WE# high (whichever occurs first) to CE# or WE# low

(whichever occurs last). Hence, tWHWL = tEHEL = tWHEL = tEHWL).

tWHVH or tWHCH/L must be met when transiting from a write cycle to a synchronous burst read.

VPP and WP# should be at a valid level until erase or program success is determined.

This specification is only applicable when transiting from a write cycle to an asynchronous read. See spec W19 and W20

for synchronous read.

When doing a Read Status operation following any command that alters the Status Register, W14 is 20 ns.

10.

Add 10 ns if the write operations results in a RCR or block lock status change, for the subsequent read operation to

reflect this change.

11.

These specs are required only when the device is in a synchronous mode and clock is active during address setup phase.

12.

This specification must be complied with by customer’s writing timing. The result would be unpredictable if any violation

to this timing specification.

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