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JS28F640P33TF70 Datasheet(PDF) 63 Page - Numonyx B.V |
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JS28F640P33TF70 Datasheet(HTML) 63 Page - Numonyx B.V |
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63 / 88 page ![]() Datasheet Jul 2011 63 Order Number:208034-04 P33-65nm SBC Table 32: System Interface Information Offset Length Description Add Hex Code Value 1Bh 1 VCC logic supply minimum program/erase voltage bits 0-3 BCD 100 mV bits 4-7 BCD volts 1B: -23 2.3V 1Ch 1 VCC logic supply maximum program/erase voltage bits 0-3 BCD 100 mV bits 4-7 BCD volts 1C: -36 3.6V 1Dh 1 VPP [programming] supply minimum program/erase voltage bits 0-3 BCD 100 mV bits 4-7 HEX volts 1D: -85 8.5V 1Eh 1 VPP [programming] supply maximum program/erase voltage bits 0-3 BCD 100 mV bits 4-7 HEX volts 1E: -95 9.5V 1Fh 1 “n” such that typical single word program time-out = 2n µ-sec 1F: -06 64 µs 20h 1 “n” such that typical full buffer write time-out = 2n µ-sec 20: -09 512 µs 21h 1 “n” such that typical block erase time-out = 2n m-sec 21: -09 0.5s 22h 1 “n” such that typical full chip erase time-out = 2n m-sec 22: -00 NA 23h 1 “n” such that maximum word program time-out = 2n times typical 23: -02 256 µs 24h 1 “n” such that maximum buffer write time-out = 2n times typical 24: -02 2048 µs 25h 1 “n” such that maximum block erase time-out = 2n times typical 25: -03 4s 26h 1 “n” such that maximum chip erase time-out = 2n times typical 26: -00 NA |
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