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CS4215 Datasheet(PDF) 20 Page - Cirrus Logic |
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CS4215 Datasheet(HTML) 20 Page - Cirrus Logic |
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20 / 52 page  Control Time Slot 5, Parallel Port Register D7 D6 D5 D4 D3 D2 D1 D0 PIO1 PIO0 RSRV 1 1 XX XX XX Register Reset (R) BIT NAME VALUE FUNCTION RSRV Reserved Bits Must be written as 0. PIO1-0 Parallel I/O Bits 1 1 3 R See the Parallel Input/Output Section. Control Time Slot 6, Reserved Register D7 D6 D5 D4 D3 D2 D1 D0 RSRV XX XX XX XX Register Reset (R) Control Time Slot 7, Version Register D7 D6 D5 D4 D3 D2 D1 D0 RSRV VER3 VER2 VER1 VER0 X X X X 0010 Register Reset (R) BIT NAME VALUE FUNCTION VER3-0 Device Version Number 0 0 0 0 0 0 0 1 0 0 1 0 0 1 2 R "C". See Appendix A. "D". See Appendix A. "E". This Data Sheet RSRV Reserved Bits Must be written as 0. BIT NAME VALUE FUNCTION RSRV Reserved Bits Must be written as 0. Control Time Slot 8, Reserved Register D7 D6 D5 D4 D3 D2 D1 D0 RSRV XX XX XX XX Register Reset (R) BIT NAME VALUE FUNCTION RSRV Reserved Bits Must be written as 0. CS4215 20 DS76F2 |
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