AN2476 datasheet(10/49 Pages) STMICROELECTRONICS

10 / 49 page

Power supply and clocks

AN2476

10/49

1.4

Main voltage regulator

In power scheme 1 or 3 (see Section 1.3: Power supply schemes on page 5) the Main

Voltage Regulator provides the 1.8V power supply starting from VDD_IO. The V18REG pin

must be connected to external stabilization capacitors (min. 10 uF Tantalum, low series

resistance, and 33nF ceramic). The V18 pin must be left unconnected. A decoupling

capacitor of 1µF must be added on the VDD_IO pin which is closest to the V18REG pin. Refer

to the diagram in the application note, AN2419, STR75x hardware development getting

started.

1.5

Low power voltage regulator

In power scheme 1 or 3 (see Section 1.3: Power supply schemes on page 5) the Low Power

Voltage Regulator is used in STANDBY Mode and in STOP Mode (when MVREG is OFF in

STOP mode).

The V18_BKP pin must be connected to an external stabilization capacitor of 1µF. It

generates a non-stabilized and non-thermally-compensated voltage of approximately 1.4V.

The output current is enough to power the backup circuitry (RTC and Wakeup Logic) or the

VCORE supply required for the kernel logic in STOP mode (with the low power control

parameters FLASH and OSC4M OFF, see Section 1.8.5: STOP mode on page 18).

●

In STANDBY mode, it provides the power supply starting from VDD_IO to the backup

circuitry while the Kernel Logic is un-powered.

●

In STOP mode, if you program the LP_PARAM13 control bit (MVREG OFF) to disable

the Main Voltage Regulator, the Low Power Voltage Regulator powers the whole digital

circuitry, saving the static consumption of the Main Voltage Regulator (~100µA typical).

1.6

Regulator startup monitor (RSM)

The Main Voltage Regulator and the Low Power Voltage Regulator have an internal

Regulator Startup Monitor (RSM) which monitors the regulated power supply.

At power-up, the RSM extends the assertion of the RESET until the regulators are operating

(until V18_BKP and V18 are at the right level).

If there is a drop in the regulated power supply, the RSM automatically generates a RESET.

This enhances the security of the system by preventing the MCU from going into an

unpredictable state.

Note:

An external reset circuit must be used to provide the RESET at VDD_IO power-up. It is not

sufficient to rely on the RESET generated by the RSM in this case. This is because RSM

operation is guaranteed only when VDD_IO is within the specification (minimum 3.0V).

When regulators are not used (VREG_DIS pin is tied to high level), the RSM is disabled.

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