STR75x general-purpose I/O ports (GPIO)

AN2710

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STR75x general-purpose I/O ports (GPIO)

2.1

Functional description

Each of the general-purpose I/O ports has three 32-bit configuration registers (PC0, PC1,

PC2), a 32-bit Data register (PD) and a 32-bit mask register (PM).

Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each

port bit of the general-purpose I/O (GPIO) ports, can be individually configured by firmware

in several modes:

●

Input floating

●

Input pull-up

●

Input pull-down

●

Analog input

●

Output open-drain

●

Output push-pull

●

Alternate function

Each I/O port bit is freely programmable, however the I/O port registers have to be accessed

as 32-bit words (half-word or byte accesses are not allowed). The purpose of the mask

register is to allow atomic read/modify accesses (or bitwise write accesses) to any of the

GPIO registers. In this way, there is no risk of an IRQ occurring between a read access and

a modify access.

Figure 7 shows the basic structure of an I/O port bit.

Figure 7.

Basic structure of an I/O port bit

Alternate function output

Alternate function input

Push-pull,

Open-drain or

disabled

Read/Write

From on-chip

peripheral

To on-chip

peripheral

Output

control

Analog input

ON/OFF

Pull

Pull

ON/OFF

I/O pin

TTL Schmitt

trigger

Protection

diode

Protection

diode

ON/OFF

Input driver

Output driver

down

up

Analog

ON/OFF

switch

AFOEN

P-MOS

N-MOS

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